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5c2f5a0877
This sends these intrinsics through isel in a much more normal way. This should allow addressing mode matching in isel to make better use of the displacement field. Differential Revision: https://reviews.llvm.org/D56827 llvm-svn: 351570
173 lines
6.8 KiB
LLVM
173 lines
6.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=X64
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declare <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float>, i8*,
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<4 x i32>, <4 x float>, i8) nounwind readonly
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define <4 x float> @test_x86_avx2_gather_d_ps(i8* %a1, <4 x i32> %idx, <4 x float> %mask) {
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; X32-LABEL: test_x86_avx2_gather_d_ps:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: vxorps %xmm2, %xmm2, %xmm2
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; X32-NEXT: vgatherdps %xmm1, (%eax,%xmm0,2), %xmm2
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; X32-NEXT: vmovaps %xmm2, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: test_x86_avx2_gather_d_ps:
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; X64: # %bb.0:
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; X64-NEXT: vxorps %xmm2, %xmm2, %xmm2
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; X64-NEXT: vgatherdps %xmm1, (%rdi,%xmm0,2), %xmm2
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; X64-NEXT: vmovaps %xmm2, %xmm0
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; X64-NEXT: retq
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%res = call <4 x float> @llvm.x86.avx2.gather.d.ps(<4 x float> undef,
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i8* %a1, <4 x i32> %idx, <4 x float> %mask, i8 2) ;
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ret <4 x float> %res
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}
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declare <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double>, i8*,
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<4 x i32>, <2 x double>, i8) nounwind readonly
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define <2 x double> @test_x86_avx2_gather_d_pd(i8* %a1, <4 x i32> %idx, <2 x double> %mask) {
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; X32-LABEL: test_x86_avx2_gather_d_pd:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: vxorpd %xmm2, %xmm2, %xmm2
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; X32-NEXT: vgatherdpd %xmm1, (%eax,%xmm0,2), %xmm2
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; X32-NEXT: vmovapd %xmm2, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: test_x86_avx2_gather_d_pd:
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; X64: # %bb.0:
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; X64-NEXT: vxorpd %xmm2, %xmm2, %xmm2
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; X64-NEXT: vgatherdpd %xmm1, (%rdi,%xmm0,2), %xmm2
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; X64-NEXT: vmovapd %xmm2, %xmm0
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; X64-NEXT: retq
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%res = call <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double> undef,
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i8* %a1, <4 x i32> %idx, <2 x double> %mask, i8 2) ;
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ret <2 x double> %res
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}
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declare <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float>, i8*,
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<8 x i32>, <8 x float>, i8) nounwind readonly
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define <8 x float> @test_x86_avx2_gather_d_ps_256(i8* %a1, <8 x i32> %idx, <8 x float> %mask) {
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; X32-LABEL: test_x86_avx2_gather_d_ps_256:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: vxorps %xmm2, %xmm2, %xmm2
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; X32-NEXT: vgatherdps %ymm1, (%eax,%ymm0,4), %ymm2
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; X32-NEXT: vmovaps %ymm2, %ymm0
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; X32-NEXT: retl
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;
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; X64-LABEL: test_x86_avx2_gather_d_ps_256:
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; X64: # %bb.0:
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; X64-NEXT: vxorps %xmm2, %xmm2, %xmm2
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; X64-NEXT: vgatherdps %ymm1, (%rdi,%ymm0,4), %ymm2
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; X64-NEXT: vmovaps %ymm2, %ymm0
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; X64-NEXT: retq
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%res = call <8 x float> @llvm.x86.avx2.gather.d.ps.256(<8 x float> undef,
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i8* %a1, <8 x i32> %idx, <8 x float> %mask, i8 4) ;
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ret <8 x float> %res
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}
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declare <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double>, i8*,
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<4 x i32>, <4 x double>, i8) nounwind readonly
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define <4 x double> @test_x86_avx2_gather_d_pd_256(i8* %a1, <4 x i32> %idx, <4 x double> %mask) {
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; X32-LABEL: test_x86_avx2_gather_d_pd_256:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: vxorpd %xmm2, %xmm2, %xmm2
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; X32-NEXT: vgatherdpd %ymm1, (%eax,%xmm0,8), %ymm2
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; X32-NEXT: vmovapd %ymm2, %ymm0
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; X32-NEXT: retl
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;
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; X64-LABEL: test_x86_avx2_gather_d_pd_256:
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; X64: # %bb.0:
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; X64-NEXT: vxorpd %xmm2, %xmm2, %xmm2
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; X64-NEXT: vgatherdpd %ymm1, (%rdi,%xmm0,8), %ymm2
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; X64-NEXT: vmovapd %ymm2, %ymm0
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; X64-NEXT: retq
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%res = call <4 x double> @llvm.x86.avx2.gather.d.pd.256(<4 x double> undef,
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i8* %a1, <4 x i32> %idx, <4 x double> %mask, i8 8) ;
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ret <4 x double> %res
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}
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define <2 x i64> @test_mm_i32gather_epi32(i32 *%a0, <2 x i64> %a1) {
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; X32-LABEL: test_mm_i32gather_epi32:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
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; X32-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; X32-NEXT: vpgatherdd %xmm2, (%eax,%xmm0,2), %xmm1
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; X32-NEXT: vmovdqa %xmm1, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm_i32gather_epi32:
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; X64: # %bb.0:
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; X64-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
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; X64-NEXT: vpxor %xmm1, %xmm1, %xmm1
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; X64-NEXT: vpgatherdd %xmm2, (%rdi,%xmm0,2), %xmm1
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; X64-NEXT: vmovdqa %xmm1, %xmm0
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; X64-NEXT: retq
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%arg0 = bitcast i32 *%a0 to i8*
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%arg1 = bitcast <2 x i64> %a1 to <4 x i32>
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%mask = bitcast <2 x i64> <i64 -1, i64 -1> to <4 x i32>
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%call = call <4 x i32> @llvm.x86.avx2.gather.d.d(<4 x i32> zeroinitializer, i8* %arg0, <4 x i32> %arg1, <4 x i32> %mask, i8 2)
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%bc = bitcast <4 x i32> %call to <2 x i64>
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ret <2 x i64> %bc
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}
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declare <4 x i32> @llvm.x86.avx2.gather.d.d(<4 x i32>, i8*, <4 x i32>, <4 x i32>, i8) nounwind readonly
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define <2 x double> @test_mm_i32gather_pd(double *%a0, <2 x i64> %a1) {
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; X32-LABEL: test_mm_i32gather_pd:
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; X32: # %bb.0:
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
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; X32-NEXT: vxorpd %xmm1, %xmm1, %xmm1
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; X32-NEXT: vgatherdpd %xmm2, (%eax,%xmm0,2), %xmm1
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; X32-NEXT: vmovapd %xmm1, %xmm0
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; X32-NEXT: retl
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;
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; X64-LABEL: test_mm_i32gather_pd:
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; X64: # %bb.0:
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; X64-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
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; X64-NEXT: vxorpd %xmm1, %xmm1, %xmm1
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; X64-NEXT: vgatherdpd %xmm2, (%rdi,%xmm0,2), %xmm1
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; X64-NEXT: vmovapd %xmm1, %xmm0
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; X64-NEXT: retq
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%arg0 = bitcast double *%a0 to i8*
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%arg1 = bitcast <2 x i64> %a1 to <4 x i32>
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%cmp = fcmp oeq <2 x double> zeroinitializer, zeroinitializer
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%sext = sext <2 x i1> %cmp to <2 x i64>
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%mask = bitcast <2 x i64> %sext to <2 x double>
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%res = call <2 x double> @llvm.x86.avx2.gather.d.pd(<2 x double> zeroinitializer, i8* %arg0, <4 x i32> %arg1, <2 x double> %mask, i8 2)
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ret <2 x double> %res
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}
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@x = global [1024 x float] zeroinitializer, align 16
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define <4 x float> @gather_global(<4 x i64>, i32* nocapture readnone) {
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; X32-LABEL: gather_global:
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; X32: # %bb.0:
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; X32-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
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; X32-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; X32-NEXT: vgatherqps %xmm2, x(,%ymm0,4), %xmm1
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; X32-NEXT: vmovaps %xmm1, %xmm0
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; X32-NEXT: vzeroupper
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; X32-NEXT: retl
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;
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; X64-LABEL: gather_global:
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; X64: # %bb.0:
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; X64-NEXT: vpcmpeqd %xmm2, %xmm2, %xmm2
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; X64-NEXT: vxorps %xmm1, %xmm1, %xmm1
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; X64-NEXT: vgatherqps %xmm2, x(,%ymm0,4), %xmm1
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; X64-NEXT: vmovaps %xmm1, %xmm0
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; X64-NEXT: vzeroupper
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; X64-NEXT: retq
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%3 = tail call <4 x float> @llvm.x86.avx2.gather.q.ps.256(<4 x float> zeroinitializer, i8* bitcast ([1024 x float]* @x to i8*), <4 x i64> %0, <4 x float> <float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000, float 0xFFFFFFFFE0000000>, i8 4)
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ret <4 x float> %3
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}
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declare <4 x float> @llvm.x86.avx2.gather.q.ps.256(<4 x float>, i8*, <4 x i64>, <4 x float>, i8)
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