mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-25 04:02:41 +01:00
d654e7d40c
Enable enableMultipleCopyHints() on X86. Original Patch by @jonpa: While enabling the mischeduler for SystemZ, it was discovered that for some reason a test needed one extra seemingly needless COPY (test/CodeGen/SystemZ/call-03.ll). The handling for that is resulted in this patch, which improves the register coalescing by providing not just one copy hint, but a sorted list of copy hints. On SystemZ, this gives ~12500 less register moves on SPEC, as well as marginally less spilling. Instead of improving just the SystemZ backend, the improvement has been implemented in common-code (calculateSpillWeightAndHint(). This gives a lot of test failures, but since this should be a general improvement I hope that the involved targets will help and review the test updates. Differential Revision: https://reviews.llvm.org/D38128 llvm-svn: 342578
35 lines
891 B
LLVM
35 lines
891 B
LLVM
; RUN: llc -mtriple=x86_64-apple-darwin8 < %s | FileCheck %s --check-prefix=X64
|
|
; RUN: llc -mtriple=x86_64-pc-linux < %s | FileCheck %s --check-prefix=X64
|
|
; RUN: llc -mtriple=i686-pc-linux < %s | FileCheck %s --check-prefix=X86
|
|
; RUN: llc -mtriple=x86_64-apple-darwin8 -terminal-rule < %s | FileCheck %s --check-prefix=X64
|
|
; RUN: llc -mtriple=x86_64-pc-linux -terminal-rule < %s | FileCheck %s --check-prefix=X64
|
|
|
|
define void @sret_void(i32* sret %p) {
|
|
store i32 0, i32* %p
|
|
ret void
|
|
}
|
|
|
|
; X64-LABEL: sret_void
|
|
; X64-DAG: movq %rdi, %rax
|
|
; X64-DAG: movl $0, (%rdi)
|
|
; X64: retq
|
|
|
|
; X86-LABEL: sret_void
|
|
; X86: movl 4(%esp), %eax
|
|
; X86: movl $0, (%eax)
|
|
; X86: retl
|
|
|
|
define i256 @sret_demoted() {
|
|
ret i256 0
|
|
}
|
|
|
|
; X64-LABEL: sret_demoted
|
|
; X64-DAG: movq %rdi, %rax
|
|
; X64-DAG: movq $0, (%rdi)
|
|
; X64: retq
|
|
|
|
; X86-LABEL: sret_demoted
|
|
; X86: movl 4(%esp), %eax
|
|
; X86: movl $0, (%eax)
|
|
; X86: retl
|