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17ef31d9cc
INC/DEC are pretty much the same as ADD/SUB except that they don't update the C flag. This patch removes the special nodes and just pattern matches from ADD/SUB during isel if the C flag isn't being used. I had to avoid selecting DEC is the result isn't used. This will become a SUB immediate which will turned into a CMP later by optimizeCompareInstr. This lead to the one test change where we use a CMP instead of a DEC for an overflow intrinsic since we only checked the flag. This also exposed a hole in our RMW flag matching use of hasNoCarryFlagUses. Our root node for the match is a store and there's no guarantee that all the flag users have been selected yet. So hasNoCarryFlagUses needs to check copyToReg and machine opcodes, but it also needs to check for the pre-match SETCC, SETCC_CARRY, BRCOND, and CMOV opcodes. Differential Revision: https://reviews.llvm.org/D55975 llvm-svn: 350245
95 lines
2.9 KiB
LLVM
95 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-linux | FileCheck %s
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@ok = internal constant [4 x i8] c"%d\0A\00"
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@no = internal constant [4 x i8] c"no\0A\00"
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define i1 @func1(i32 %v1, i32 %v2) nounwind {
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; CHECK-LABEL: func1:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: subl $12, %esp
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: subl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: jno .LBB0_1
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; CHECK-NEXT: # %bb.2: # %overflow
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; CHECK-NEXT: movl $no, (%esp)
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; CHECK-NEXT: calll printf
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: addl $12, %esp
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB0_1: # %normal
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl $ok, (%esp)
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; CHECK-NEXT: calll printf
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: addl $12, %esp
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; CHECK-NEXT: retl
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entry:
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %v1, i32 %v2)
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%sum = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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br i1 %obit, label %overflow, label %normal
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normal:
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%t1 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
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ret i1 true
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overflow:
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%t2 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @no, i32 0, i32 0) ) nounwind
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ret i1 false
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}
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define i1 @func2(i32 %v1, i32 %v2) nounwind {
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; CHECK-LABEL: func2:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: subl $12, %esp
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; CHECK-NEXT: movl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: subl {{[0-9]+}}(%esp), %eax
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; CHECK-NEXT: jae .LBB1_1
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; CHECK-NEXT: # %bb.2: # %carry
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; CHECK-NEXT: movl $no, (%esp)
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; CHECK-NEXT: calll printf
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; CHECK-NEXT: xorl %eax, %eax
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; CHECK-NEXT: addl $12, %esp
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; CHECK-NEXT: retl
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; CHECK-NEXT: .LBB1_1: # %normal
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; CHECK-NEXT: movl %eax, {{[0-9]+}}(%esp)
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; CHECK-NEXT: movl $ok, (%esp)
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; CHECK-NEXT: calll printf
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; CHECK-NEXT: movb $1, %al
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; CHECK-NEXT: addl $12, %esp
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; CHECK-NEXT: retl
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entry:
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%t = call {i32, i1} @llvm.usub.with.overflow.i32(i32 %v1, i32 %v2)
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%sum = extractvalue {i32, i1} %t, 0
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%obit = extractvalue {i32, i1} %t, 1
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br i1 %obit, label %carry, label %normal
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normal:
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%t1 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @ok, i32 0, i32 0), i32 %sum ) nounwind
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ret i1 true
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carry:
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%t2 = tail call i32 (i8*, ...) @printf( i8* getelementptr ([4 x i8], [4 x i8]* @no, i32 0, i32 0) ) nounwind
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ret i1 false
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}
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declare i32 @printf(i8*, ...) nounwind
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declare {i32, i1} @llvm.ssub.with.overflow.i32(i32, i32)
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declare {i32, i1} @llvm.usub.with.overflow.i32(i32, i32)
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define i1 @func3(i32 %x) nounwind {
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; CHECK-LABEL: func3:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: cmpl $1, {{[0-9]+}}(%esp)
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; CHECK-NEXT: seto %al
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; CHECK-NEXT: retl
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entry:
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%t = call {i32, i1} @llvm.ssub.with.overflow.i32(i32 %x, i32 1)
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%obit = extractvalue {i32, i1} %t, 1
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ret i1 %obit
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}
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