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30264d4391
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
44 lines
1.4 KiB
LLVM
44 lines
1.4 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i386-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X32
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; RUN: llc < %s -mtriple=x86_64-unknown -mattr=+sse2 | FileCheck %s --check-prefix=X64
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; Used movq to load i64 into a v2i64 when the top i64 is 0.
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define <2 x i64> @foo1(i64* %y) nounwind {
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; X32-LABEL: foo1:
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; X32: # %bb.0: # %entry
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; X32-NEXT: retl
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;
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; X64-LABEL: foo1:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; X64-NEXT: retq
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entry:
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%tmp1 = load i64, i64* %y, align 8
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%s2v = insertelement <2 x i64> undef, i64 %tmp1, i32 0
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%loadl = shufflevector <2 x i64> zeroinitializer, <2 x i64> %s2v, <2 x i32> <i32 2, i32 1>
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ret <2 x i64> %loadl
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}
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define <4 x float> @foo2(i64* %p) nounwind {
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; X32-LABEL: foo2:
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; X32: # %bb.0: # %entry
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; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X32-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; X32-NEXT: retl
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;
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; X64-LABEL: foo2:
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; X64: # %bb.0: # %entry
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; X64-NEXT: movsd {{.*#+}} xmm0 = mem[0],zero
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; X64-NEXT: retq
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entry:
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%load = load i64, i64* %p
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%s2v = insertelement <2 x i64> undef, i64 %load, i32 0
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%loadl = shufflevector <2 x i64> zeroinitializer, <2 x i64> %s2v, <2 x i32> <i32 2, i32 1>
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%0 = bitcast <2 x i64> %loadl to <4 x float>
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ret <4 x float> %0
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}
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