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https://github.com/RPCS3/llvm-mirror.git
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dcde6a778e
llvm-svn: 355412
66 lines
1.9 KiB
LLVM
66 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-- -mattr=+sse2 | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-- -mattr=+sse2 | FileCheck %s --check-prefix=X64
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define void @foo(<4 x float>* %P) {
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; X86-LABEL: foo:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: xorps %xmm0, %xmm0
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; X86-NEXT: addps (%eax), %xmm0
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; X86-NEXT: movaps %xmm0, (%eax)
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; X86-NEXT: retl
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;
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; X64-LABEL: foo:
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; X64: # %bb.0:
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: addps (%rdi), %xmm0
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: retq
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%T = load <4 x float>, <4 x float>* %P
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%S = fadd <4 x float> zeroinitializer, %T
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store <4 x float> %S, <4 x float>* %P
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ret void
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}
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define void @bar(<4 x i32>* %P) {
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; X86-LABEL: bar:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: pxor %xmm0, %xmm0
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; X86-NEXT: psubd (%eax), %xmm0
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; X86-NEXT: movdqa %xmm0, (%eax)
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; X86-NEXT: retl
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;
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; X64-LABEL: bar:
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; X64: # %bb.0:
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; X64-NEXT: pxor %xmm0, %xmm0
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; X64-NEXT: psubd (%rdi), %xmm0
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; X64-NEXT: movdqa %xmm0, (%rdi)
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; X64-NEXT: retq
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%T = load <4 x i32>, <4 x i32>* %P
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%S = sub <4 x i32> zeroinitializer, %T
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store <4 x i32> %S, <4 x i32>* %P
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ret void
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}
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; Without any type hints from operations, we fall back to the smaller xorps.
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; The IR type <4 x i32> is ignored.
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define void @untyped_zero(<4 x i32>* %p) {
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; X86-LABEL: untyped_zero:
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; X86: # %bb.0: # %entry
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: xorps %xmm0, %xmm0
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; X86-NEXT: movaps %xmm0, (%eax)
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; X86-NEXT: retl
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;
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; X64-LABEL: untyped_zero:
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; X64: # %bb.0: # %entry
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; X64-NEXT: xorps %xmm0, %xmm0
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; X64-NEXT: movaps %xmm0, (%rdi)
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; X64-NEXT: retq
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entry:
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store <4 x i32> zeroinitializer, <4 x i32>* %p, align 16
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ret void
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}
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