1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-23 13:02:52 +02:00
llvm-mirror/test/CodeGen
Akira Hatanaka 5d29050f58 [DAGCombine] Fix a bug in MergeConsecutiveStores.
The bug manifests when there are two loads and two stores chained as follows in
a DAG,

(ld v3f32) -> (st f32) -> (ld v3f32) -> (st f32)

and the stores' values are extracted from the preceding vector loads.

MergeConsecutiveStores would replace the first store in the chain with the
merged vector store, which would create a cycle between the merged store node
and the last load node that appears in the chain.

This commits fixes the bug by replacing the last store in the chain instead.

rdar://problem/20275084

Differential Revision: http://reviews.llvm.org/D8849

llvm-svn: 234430
2015-04-08 20:34:53 +00:00
..
AArch64 [DAGCombine] Fix a bug in MergeConsecutiveStores. 2015-04-08 20:34:53 +00:00
ARM [ARM] make vminnm/vmaxnm work with ?le, ?ge and no-nans-fp-math 2015-04-08 17:18:28 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips Use sext in fast isel. 2015-04-06 22:29:07 +00:00
MSP430
NVPTX
PowerPC Strip trailing whitespace and reword explanatory comment. 2015-04-04 02:26:47 +00:00
R600 R600/SI: Don't print offset0/offset1 DS operands when they are 0 2015-04-08 01:09:19 +00:00
SPARC
SystemZ [SystemZ] Support transactional execution on zEC12 2015-04-01 12:51:43 +00:00
Thumb
Thumb2
WinEH [WinEH] Fix xdata generation when no catch object is present 2015-04-07 19:46:38 +00:00
X86 [DAGCombine] Fix a bug in MergeConsecutiveStores. 2015-04-08 20:34:53 +00:00
XCore