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llvm-mirror/test/CodeGen/MIR/X86/expected-named-register-in-callee-saved-register.mir
Alex Lorenz c21c095194 MIR Serialization: Change MIR syntax - use custom syntax for MBBs.
This commit modifies the way the machine basic blocks are serialized - now the
machine basic blocks are serialized using a custom syntax instead of relying on
YAML primitives. Instead of using YAML mappings to represent the individual
machine basic blocks in a machine function's body, the new syntax uses a single
YAML block scalar which contains all of the machine basic blocks and
instructions for that function.

This is an example of a function's body that uses the old syntax:

    body:
      - id: 0
        name: entry
        instructions:
          - '%eax = MOV32r0 implicit-def %eflags'
          - 'RETQ %eax'
    ...

The same body is now written like this:

    body: |
      bb.0.entry:
        %eax = MOV32r0 implicit-def %eflags
        RETQ %eax
    ...

This syntax change is motivated by the fact that the bundled machine
instructions didn't map that well to the old syntax which was using a single
YAML sequence to store all of the machine instructions in a block. The bundled
machine instructions internally use flags like BundledPred and BundledSucc to
determine the bundles, and serializing them as MI flags using the old syntax
would have had a negative impact on the readability and the ease of editing
for MIR files. The new syntax allows me to serialize the bundled machine
instructions using a block construct without relying on the internal flags,
for example:

   BUNDLE implicit-def dead %itstate, implicit-def %s1 ... {
      t2IT 1, 24, implicit-def %itstate
      %s1 = VMOVS killed %s0, 1, killed %cpsr, implicit killed %itstate
   }

This commit also converts the MIR testcases to the new syntax. I developed
a script that can convert from the old syntax to the new one. I will post the
script on the llvm-commits mailing list in the thread for this commit.

llvm-svn: 244982
2015-08-13 23:10:16 +00:00

89 lines
2.0 KiB
YAML

# RUN: not llc -march=x86-64 -start-after prologepilog -stop-after prologepilog -o /dev/null %s 2>&1 | FileCheck %s
--- |
define i32 @compute(i32 %a) {
body:
ret i32 %a
}
define i32 @func(i32 %a) {
entry:
%b = alloca i32
store i32 %a, i32* %b
br label %check
check:
%comp = icmp sle i32 %a, 10
br i1 %comp, label %loop, label %exit
loop:
%c = load i32, i32* %b
%d = call i32 @compute(i32 %c)
%e = sub i32 %d, 1
store i32 %e, i32* %b
br label %check
exit:
ret i32 0
}
...
---
name: compute
tracksRegLiveness: true
body: |
bb.0.body:
liveins: %edi
%eax = COPY killed %edi
RETQ killed %eax
...
---
name: func
tracksRegLiveness: true
frameInfo:
stackSize: 24
maxAlignment: 4
adjustsStack: true
hasCalls: true
fixedStack:
# CHECK: [[@LINE+1]]:93: expected a named register
- { id: 0, type: spill-slot, offset: -16, size: 8, alignment: 16, callee-saved-register: '%0' }
stack:
- { id: 0, name: b, offset: -20, size: 4, alignment: 4 }
body: |
bb.0.entry:
successors: %bb.1.check
liveins: %edi, %rbx
frame-setup PUSH64r killed %rbx, implicit-def %rsp, implicit %rsp
%rsp = frame-setup SUB64ri8 %rsp, 16, implicit-def dead %eflags
%ebx = COPY %edi
MOV32mr %rsp, 1, _, 12, _, %ebx
bb.1.check:
successors: %bb.2.loop, %bb.3.exit
liveins: %ebx
CMP32ri8 %ebx, 10, implicit-def %eflags
JG_1 %bb.3.exit, implicit killed %eflags
JMP_1 %bb.2.loop
bb.2.loop:
successors: %bb.1.check
liveins: %ebx
%edi = MOV32rm %rsp, 1, _, 12, _
CALL64pcrel32 @compute, csr_64, implicit %rsp, implicit %edi, implicit-def %rsp, implicit-def %eax
%eax = DEC32r killed %eax, implicit-def dead %eflags
MOV32mr %rsp, 1, _, 12, _, killed %eax
JMP_1 %bb.1.check
bb.3.exit:
%eax = MOV32r0 implicit-def dead %eflags
%rsp = ADD64ri8 %rsp, 16, implicit-def dead %eflags
%rbx = POP64r implicit-def %rsp, implicit %rsp
RETQ %eax
...