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7882eec9af
Summary: This patch fixes the cases of sext/zext constant folding in DAG combiner where constans do not fit 64 bits. The fix simply removes un$ Test Plan: New regression test included. Reviewers: RKSimon Reviewed By: RKSimon Subscribers: RKSimon, llvm-commits Differential Revision: http://reviews.llvm.org/D10607 llvm-svn: 240991
93 lines
2.3 KiB
LLVM
93 lines
2.3 KiB
LLVM
; RUN: llc < %s -march=x86 | FileCheck %s -check-prefix=X32
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; RUN: llc < %s -march=x86-64 | FileCheck %s -check-prefix=X64
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; DAGCombiner crashes during sext folding
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define <2 x i256> @test_sext1() {
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%Se = sext <2 x i8> <i8 -100, i8 -99> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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; X64-LABEL: test_sext1
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; X64: movq $-1
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; X64-NEXT: movq $-1
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; X64-NEXT: movq $-1
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; X64-NEXT: movq $-99
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; X32-LABEL: test_sext1
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; X32: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-99
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}
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define <2 x i256> @test_sext2() {
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%Se = sext <2 x i128> <i128 -2000, i128 -1999> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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; X64-LABEL: test_sext2
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; X64: movq $-1
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; X64-NEXT: movq $-1
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; X64-NEXT: movq $-1
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; X64-NEXT: movq $-1999
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; X32-LABEL: test_sext2
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; X32: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1999
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}
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define <2 x i256> @test_zext1() {
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%Se = zext <2 x i8> <i8 -1, i8 -2> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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; X64-LABEL: test_zext1
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; X64: movq $0
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; X64-NEXT: movq $0
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; X64-NEXT: movq $0
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; X64-NEXT: movq $254
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; X32-LABEL: test_zext1
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; X32: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $254
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}
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define <2 x i256> @test_zext2() {
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%Se = zext <2 x i128> <i128 -1, i128 -2> to <2 x i256>
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%Shuff = shufflevector <2 x i256> zeroinitializer, <2 x i256> %Se, <2 x i32> <i32 1, i32 3>
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ret <2 x i256> %Shuff
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; X64-LABEL: test_zext2
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; X64: movq $0
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; X64-NEXT: movq $0
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; X64-NEXT: movq $-1
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; X64-NEXT: movq $-2
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; X32-LABEL: test_zext2
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; X32: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $0
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-1
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; X32-NEXT: movl $-2
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}
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