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5dc9f991c9
logical operations on the i1's driving them. This is a bad idea for every target I can think of (confirmed with micro tests on all of: x86-64, ARM, AArch64, Mips, and PowerPC) because it forces the i1 to be materialized into a general purpose register, whereas consuming it directly into a select generally allows it to exist only transiently in a predicate or flags register. Chandler ran a set of performance tests with this change, and reported no measurable change on x86-64. llvm-svn: 201275 |
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.. | ||
CMakeLists.txt | ||
InstCombine.h | ||
InstCombineAddSub.cpp | ||
InstCombineAndOrXor.cpp | ||
InstCombineCalls.cpp | ||
InstCombineCasts.cpp | ||
InstCombineCompares.cpp | ||
InstCombineLoadStoreAlloca.cpp | ||
InstCombineMulDivRem.cpp | ||
InstCombinePHI.cpp | ||
InstCombineSelect.cpp | ||
InstCombineShifts.cpp | ||
InstCombineSimplifyDemanded.cpp | ||
InstCombineVectorOps.cpp | ||
InstCombineWorklist.h | ||
InstructionCombining.cpp | ||
LLVMBuild.txt | ||
Makefile |