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5867567c41
Patch by Ana Pazos. 1.Added support for v1ix and v1fx types. 2.Added Scalar Pairwise Reduce instructions. 3.Added initial implementation of Scalar Arithmetic instructions. llvm-svn: 191263
51 lines
1.7 KiB
LLVM
51 lines
1.7 KiB
LLVM
; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon | FileCheck %s
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define <1 x i64> @add1xi64(<1 x i64> %A, <1 x i64> %B) {
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;CHECK: add {{d[0-31]+}}, {{d[0-31]+}}, {{d[0-31]+}}
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%tmp3 = add <1 x i64> %A, %B;
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ret <1 x i64> %tmp3
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}
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define <1 x i64> @sub1xi64(<1 x i64> %A, <1 x i64> %B) {
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;CHECK: sub {{d[0-31]+}}, {{d[0-31]+}}, {{d[0-31]+}}
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%tmp3 = sub <1 x i64> %A, %B;
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ret <1 x i64> %tmp3
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}
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declare <1 x i64> @llvm.aarch64.neon.vaddds(<1 x i64>, <1 x i64>)
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declare <1 x i64> @llvm.aarch64.neon.vadddu(<1 x i64>, <1 x i64>)
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define <1 x i64> @test_add_v1i64(<1 x i64> %lhs, <1 x i64> %rhs) {
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; CHECK: test_add_v1i64:
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%tmp1 = call <1 x i64> @llvm.aarch64.neon.vaddds(<1 x i64> %lhs, <1 x i64> %rhs)
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; CHECK: add {{d[0-31]+}}, {{d[0-31]+}}, {{d[0-31]+}}
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ret <1 x i64> %tmp1
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}
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define <1 x i64> @test_uadd_v1i64(<1 x i64> %lhs, <1 x i64> %rhs) {
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; CHECK: test_uadd_v1i64:
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%tmp1 = call <1 x i64> @llvm.aarch64.neon.vadddu(<1 x i64> %lhs, <1 x i64> %rhs)
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;CHECK: add {{d[0-31]+}}, {{d[0-31]+}}, {{d[0-31]+}}
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ret <1 x i64> %tmp1
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}
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declare <1 x i64> @llvm.aarch64.neon.vsubds(<1 x i64>, <1 x i64>)
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declare <1 x i64> @llvm.aarch64.neon.vsubdu(<1 x i64>, <1 x i64>)
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define <1 x i64> @test_sub_v1i64(<1 x i64> %lhs, <1 x i64> %rhs) {
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; CHECK: test_sub_v1i64:
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%tmp1 = call <1 x i64> @llvm.aarch64.neon.vsubds(<1 x i64> %lhs, <1 x i64> %rhs)
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; CHECK: sub {{d[0-31]+}}, {{d[0-31]+}}, {{d[0-31]+}}
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ret <1 x i64> %tmp1
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}
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define <1 x i64> @test_usub_v1i64(<1 x i64> %lhs, <1 x i64> %rhs) {
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; CHECK: test_usub_v1i64:
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%tmp1 = call <1 x i64> @llvm.aarch64.neon.vsubdu(<1 x i64> %lhs, <1 x i64> %rhs)
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;CHECK: sub {{d[0-31]+}}, {{d[0-31]+}}, {{d[0-31]+}}
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ret <1 x i64> %tmp1
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}
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