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26169930ef
Summary: Change VEAsmParser to support identification with relocation information in assmebler. Change VEAsmBackend to support relocation information in MC layer. Change VEDisassembler and VEMCCodeEmitter to support binary generation of branch target operands. Add REFLONG fixup and variant kind to support new R_VE_REFLONG ELF symbol. And, add regression test in both MC and CodeGen to check binary genaration with relocation information. Differential Revision: https://reviews.llvm.org/D81553
15 lines
490 B
ArmAsm
15 lines
490 B
ArmAsm
# RUN: llvm-mc -triple=ve %s -o - | FileCheck %s
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# RUN: llvm-mc -triple=ve -filetype=obj %s -o - | llvm-objdump -r - | FileCheck %s --check-prefix=CHECK-OBJ
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lea %s34, x@tpoff_lo
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and %s34, %s34, (32)0
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lea.sl %s34, x@tpoff_hi(%s34)
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adds.l %s0, %s14, %s34
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# CHECK: lea %s34, x@tpoff_lo
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# CHECK-NEXT: and %s34, %s34, (32)0
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# CHECK-NEXT: lea.sl %s34, x@tpoff_hi(%s34)
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# CHECK-NEXT: adds.l %s0, %s14, %s34
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# CHECK-OBJ: 0 R_VE_TPOFF_LO32 x
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# CHECK-OBJ-NEXT: 10 R_VE_TPOFF_HI32 x
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