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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-25 05:52:53 +02:00
llvm-mirror/lib/Target/Sparc
2003-07-07 22:18:42 +00:00
..
.cvsignore Since there is now another derived .inc file, ignore them all. 2003-05-29 20:15:27 +00:00
EmitAssembly.cpp Major bug fix though it happened rarely (only on a compare after an 2003-07-06 20:13:59 +00:00
EmitBytecodeToAssembly.cpp changed implementation of LLVM BYTECODE Length 2002-07-25 17:22:48 +00:00
Makefile Merged in autoconf branch. This provides configuration via the autoconf 2003-06-30 21:59:07 +00:00
MappingInfo.cpp lib/CodeGen/Mapping/MappingInfo.cpp: 2003-06-04 22:07:12 +00:00
MappingInfo.h Add file comment. Include <vector> and <string>. Update include guards 2003-06-04 22:02:47 +00:00
PeepholeOpts.cpp Cleaned up code layout; no functional changes. 2003-05-23 19:20:57 +00:00
PreSelection.cpp (1) Major bug fix: DecomposeArrayRef() replaces its argument instr. and 2003-07-02 01:23:15 +00:00
PrologEpilogCodeInserter.cpp * Changed Bcc instructions to behave like BPcc instructions 2003-06-06 09:52:23 +00:00
Sparc.burg.in Add support for compiling varargs functions. 2003-05-25 15:59:47 +00:00
Sparc.cpp lib/Target/Sparc/Sparc.cpp: 2003-06-18 21:14:23 +00:00
SparcInstr.def RDCCR defines arg. #1, not arg. #2. 2003-06-20 11:32:11 +00:00
SparcInstrInfo.cpp Merged in autoconf branch. This provides configuration via the autoconf 2003-06-30 21:59:07 +00:00
SparcInstrSelection.cpp Major bug fix though it happened rarely (only on a compare after an 2003-07-06 20:13:59 +00:00
SparcInstrSelectionSupport.h * Changed Bcc instructions to behave like BPcc instructions 2003-06-06 09:52:23 +00:00
SparcInternals.h Moved RegClassIDs enum to be next to the RegTypes enum. 2003-07-07 16:52:39 +00:00
SparcRegClassInfo.cpp Correction to last fix: Pointer types do not return true in Type::IsIntegral(). 2003-07-06 22:50:31 +00:00
SparcRegClassInfo.h Major bug fix though it happened rarely (only on a compare after an 2003-07-06 20:13:59 +00:00
SparcRegInfo.cpp Major bug fix though it happened rarely (only on a compare after an 2003-07-06 20:13:59 +00:00
SparcV9_F2.td Moved predict and annul fields to the end of each individual instruction 2003-06-05 23:33:15 +00:00
SparcV9_F3.td Removed unnecessary assignment (it was taken care by a superclass) and clarified 2003-07-07 22:18:06 +00:00
SparcV9_F4.td * Force all "don't care" bits to 0 so that there are absolutely no unset bits in 2003-07-02 19:37:48 +00:00
SparcV9_Reg.td * Broke up SparcV9.td into separate files as it was getting unmanageable 2003-05-29 03:31:43 +00:00
SparcV9.td Elaborated assembly syntax of instructions in the comments. 2003-07-07 22:18:42 +00:00
SparcV9CodeEmitter.cpp Apparently, the "regType" and "regClass" used in the Sparc backend are not both 2003-07-03 18:36:47 +00:00
SparcV9CodeEmitter.h Apparently, the "regType" and "regClass" used in the Sparc backend are not both 2003-07-03 18:36:47 +00:00
StackSlots.cpp Rename MachineInstrInfo -> TargetInstrInfo 2003-01-14 22:00:31 +00:00
UltraSparcSchedInfo.cpp Added 'r' and 'i' versions to WRCCR. 2003-06-06 09:52:58 +00:00