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https://github.com/RPCS3/llvm-mirror.git
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5efe040582
Initialize all AArch64-specific passes in the TargetMachine so they can be run by llc. This can lead to conflicts in opt with some command line options that share the same name as the pass, so I took this opportunity to do some cleanups: * rename all relevant command line options from "aarch64-blah" to "aarch64-enable-blah" and update the tests accordingly * run clang-format on their declarations * move all these declarations to a common place (the TargetMachine) as opposed to having them scattered around (AArch64BranchRelaxation and AArch64AddressTypePromotion were the only offenders) llvm-svn: 277322
85 lines
2.0 KiB
LLVM
85 lines
2.0 KiB
LLVM
; RUN: llc -verify-machineinstrs -o - %s -mtriple=arm64-apple-ios7.0 -aarch64-enable-atomic-cfg-tidy=0 | FileCheck %s
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; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -mattr=-fp-armv8 -aarch64-enable-atomic-cfg-tidy=0 | FileCheck --check-prefix=CHECK-NOFP %s
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define i32 @test_select_i32(i1 %bit, i32 %a, i32 %b) {
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; CHECK-LABEL: test_select_i32:
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%val = select i1 %bit, i32 %a, i32 %b
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; CHECK: tst w0, #0x1
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; CHECK-NEXT: csel w0, w1, w2, ne
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ret i32 %val
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}
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define i64 @test_select_i64(i1 %bit, i64 %a, i64 %b) {
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; CHECK-LABEL: test_select_i64:
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%val = select i1 %bit, i64 %a, i64 %b
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; CHECK: tst w0, #0x1
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; CHECK-NEXT: csel x0, x1, x2, ne
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ret i64 %val
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}
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define float @test_select_float(i1 %bit, float %a, float %b) {
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; CHECK-LABEL: test_select_float:
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%val = select i1 %bit, float %a, float %b
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; CHECK: tst w0, #0x1
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; CHECK-NEXT: fcsel s0, s0, s1, ne
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; CHECK-NOFP-NOT: fcsel
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ret float %val
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}
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define double @test_select_double(i1 %bit, double %a, double %b) {
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; CHECK-LABEL: test_select_double:
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%val = select i1 %bit, double %a, double %b
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; CHECK: tst w0, #0x1
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; CHECK-NEXT: fcsel d0, d0, d1, ne
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; CHECK-NOFP-NOT: fcsel
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ret double %val
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}
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define i32 @test_brcond(i1 %bit) {
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; CHECK-LABEL: test_brcond:
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br i1 %bit, label %true, label %false
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; CHECK: tbz {{w[0-9]+}}, #0, {{.?LBB}}
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true:
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ret i32 0
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false:
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ret i32 42
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}
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define i1 @test_setcc_float(float %lhs, float %rhs) {
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; CHECK: test_setcc_float
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%val = fcmp oeq float %lhs, %rhs
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; CHECK: fcmp s0, s1
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; CHECK: cset w0, eq
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; CHECK-NOFP-NOT: fcmp
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ret i1 %val
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}
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define i1 @test_setcc_double(double %lhs, double %rhs) {
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; CHECK: test_setcc_double
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%val = fcmp oeq double %lhs, %rhs
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; CHECK: fcmp d0, d1
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; CHECK: cset w0, eq
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; CHECK-NOFP-NOT: fcmp
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ret i1 %val
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}
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define i1 @test_setcc_i32(i32 %lhs, i32 %rhs) {
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; CHECK: test_setcc_i32
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%val = icmp ugt i32 %lhs, %rhs
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; CHECK: cmp w0, w1
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; CHECK: cset w0, hi
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ret i1 %val
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}
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define i1 @test_setcc_i64(i64 %lhs, i64 %rhs) {
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; CHECK: test_setcc_i64
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%val = icmp ne i64 %lhs, %rhs
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; CHECK: cmp x0, x1
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; CHECK: cset w0, ne
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ret i1 %val
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}
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