mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-01 08:23:21 +01:00
5f6f8101d5
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt llvm-svn: 72897
42 lines
2.6 KiB
LLVM
42 lines
2.6 KiB
LLVM
; RUN: llvm-as < %s | llc -march=x86 -mattr=+sse,+sse2 -o %t -f
|
|
; RUN: grep minss %t | grep CPI | count 2
|
|
; RUN: grep CPI %t | not grep movss
|
|
|
|
target datalayout = "e-p:32:32"
|
|
target triple = "i686-apple-darwin8.7.2"
|
|
|
|
define i16 @test1(float %f) nounwind {
|
|
%tmp = insertelement <4 x float> undef, float %f, i32 0 ; <<4 x float>> [#uses=1]
|
|
%tmp10 = insertelement <4 x float> %tmp, float 0.000000e+00, i32 1 ; <<4 x float>> [#uses=1]
|
|
%tmp11 = insertelement <4 x float> %tmp10, float 0.000000e+00, i32 2 ; <<4 x float>> [#uses=1]
|
|
%tmp12 = insertelement <4 x float> %tmp11, float 0.000000e+00, i32 3 ; <<4 x float>> [#uses=1]
|
|
%tmp28 = tail call <4 x float> @llvm.x86.sse.sub.ss( <4 x float> %tmp12, <4 x float> < float 1.000000e+00, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
|
|
%tmp37 = tail call <4 x float> @llvm.x86.sse.mul.ss( <4 x float> %tmp28, <4 x float> < float 5.000000e-01, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
|
|
%tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp37, <4 x float> < float 6.553500e+04, float 0.000000e+00, float 0.000000e+00, float 0.000000e+00 > ) ; <<4 x float>> [#uses=1]
|
|
%tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> zeroinitializer ) ; <<4 x float>> [#uses=1]
|
|
%tmp.upgrd.1 = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
|
|
%tmp69 = trunc i32 %tmp.upgrd.1 to i16 ; <i16> [#uses=1]
|
|
ret i16 %tmp69
|
|
}
|
|
|
|
define i16 @test2(float %f) nounwind {
|
|
%tmp28 = fsub float %f, 1.000000e+00 ; <float> [#uses=1]
|
|
%tmp37 = fmul float %tmp28, 5.000000e-01 ; <float> [#uses=1]
|
|
%tmp375 = insertelement <4 x float> undef, float %tmp37, i32 0 ; <<4 x float>> [#uses=1]
|
|
%tmp48 = tail call <4 x float> @llvm.x86.sse.min.ss( <4 x float> %tmp375, <4 x float> < float 6.553500e+04, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1]
|
|
%tmp59 = tail call <4 x float> @llvm.x86.sse.max.ss( <4 x float> %tmp48, <4 x float> < float 0.000000e+00, float undef, float undef, float undef > ) ; <<4 x float>> [#uses=1]
|
|
%tmp = tail call i32 @llvm.x86.sse.cvttss2si( <4 x float> %tmp59 ) ; <i32> [#uses=1]
|
|
%tmp69 = trunc i32 %tmp to i16 ; <i16> [#uses=1]
|
|
ret i16 %tmp69
|
|
}
|
|
|
|
declare <4 x float> @llvm.x86.sse.sub.ss(<4 x float>, <4 x float>)
|
|
|
|
declare <4 x float> @llvm.x86.sse.mul.ss(<4 x float>, <4 x float>)
|
|
|
|
declare <4 x float> @llvm.x86.sse.min.ss(<4 x float>, <4 x float>)
|
|
|
|
declare <4 x float> @llvm.x86.sse.max.ss(<4 x float>, <4 x float>)
|
|
|
|
declare i32 @llvm.x86.sse.cvttss2si(<4 x float>)
|