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Ahmed Bougacha 5f7023b12c [AArch64] Support selecting STNP.
We could go through the load/store optimizer and match STNP where
we would have matched a nontemporal-annotated STP, but that's not
reliable enough, as an opportunistic optimization.
Insetad, we can guarantee emitting STNP, by matching them at ISel.
Since there are no single-input nontemporal stores, we have to
resort to some high-bits-extracting trickery to generate an STNP
from a plain store.

Also, we need to support another, LDP/STP-specific addressing mode,
base + signed scaled 7-bit immediate offset.
For now, only match the base. Let's make it smart separately.

Part of PR24086.

llvm-svn: 247231
2015-09-10 01:42:28 +00:00
2015-09-10 01:42:28 +00:00
2015-09-10 01:42:28 +00:00
2014-04-07 03:57:04 +00:00
2014-03-02 13:08:46 +00:00
2015-03-12 01:25:29 +00:00

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