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https://github.com/RPCS3/llvm-mirror.git
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84b83b6cc1
As of 1fed131660b2c5d3ea7007e273a7a5da80699445, we have code that changes shuffle masks so that we can put the shuffle in a canonical form that can be matched to a single instruction. However, it does not properly account for undef elements in the BUILD_VECTOR that is the RHS splat so we can end up with undefs where they shouldn't be. This patch converts the splat input with undefs to one without.
380 lines
14 KiB
LLVM
380 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s --check-prefix=CHECK-P8
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr9 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
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; RUN: FileCheck %s --check-prefix=CHECK-P9
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; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
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; RUN: -mcpu=pwr8 -mattr=-vsx -ppc-asm-full-reg-names \
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; RUN: -ppc-vsr-nums-as-vr < %s | FileCheck %s --check-prefix=CHECK-NOVSX
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define dso_local <16 x i8> @testmrghb(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrghb:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrghb v2, v3, v2
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrghb:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrghb v2, v3, v2
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrghb:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: vmrghb v2, v3, v2
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 24, i32 9, i32 25, i32 10, i32 26, i32 11, i32 27, i32 12, i32 28, i32 13, i32 29, i32 14, i32 30, i32 15, i32 31>
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ret <16 x i8> %shuffle
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}
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define dso_local <16 x i8> @testmrghb2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrghb2:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrghb v2, v2, v3
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrghb2:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrghb v2, v2, v3
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrghb2:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI1_0@toc@ha
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; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI1_0@toc@l
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; CHECK-NOVSX-NEXT: lvx v4, 0, r3
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; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 24, i32 8, i32 25, i32 9, i32 26, i32 10, i32 27, i32 11, i32 28, i32 12, i32 29, i32 13, i32 30, i32 14, i32 31, i32 15>
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ret <16 x i8> %shuffle
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}
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define dso_local <16 x i8> @testmrghh(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrghh:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrghh v2, v3, v2
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrghh:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrghh v2, v3, v2
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrghh:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: vmrghh v2, v3, v2
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 9, i32 24, i32 25, i32 10, i32 11, i32 26, i32 27, i32 12, i32 13, i32 28, i32 29, i32 14, i32 15, i32 30, i32 31>
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ret <16 x i8> %shuffle
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}
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define dso_local <16 x i8> @testmrghh2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrghh2:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrghh v2, v2, v3
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrghh2:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrghh v2, v2, v3
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrghh2:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI3_0@toc@ha
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; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI3_0@toc@l
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; CHECK-NOVSX-NEXT: lvx v4, 0, r3
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; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 24, i32 25, i32 8, i32 9, i32 26, i32 27, i32 10, i32 11, i32 28, i32 29, i32 12, i32 13, i32 30, i32 31, i32 14, i32 15>
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ret <16 x i8> %shuffle
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}
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define dso_local <16 x i8> @testmrglb(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrglb:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrglb v2, v3, v2
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrglb:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrglb v2, v3, v2
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrglb:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: vmrglb v2, v3, v2
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 16, i32 1, i32 17, i32 2, i32 18, i32 3, i32 19, i32 4, i32 20, i32 5, i32 21, i32 6, i32 22, i32 7, i32 23>
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ret <16 x i8> %shuffle
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}
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define dso_local <16 x i8> @testmrglb2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrglb2:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrglb v2, v2, v3
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrglb2:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrglb v2, v2, v3
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrglb2:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI5_0@toc@ha
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; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI5_0@toc@l
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; CHECK-NOVSX-NEXT: lvx v4, 0, r3
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; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 0, i32 17, i32 1, i32 18, i32 2, i32 19, i32 3, i32 20, i32 4, i32 21, i32 5, i32 22, i32 6, i32 23, i32 7>
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ret <16 x i8> %shuffle
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}
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define dso_local <16 x i8> @testmrglh(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrglh:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrglh v2, v3, v2
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrglh:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrglh v2, v3, v2
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrglh:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: vmrglh v2, v3, v2
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 16, i32 17, i32 2, i32 3, i32 18, i32 19, i32 4, i32 5, i32 20, i32 21, i32 6, i32 7, i32 22, i32 23>
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ret <16 x i8> %shuffle
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}
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define dso_local <16 x i8> @testmrglh2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrglh2:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrglh v2, v2, v3
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrglh2:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrglh v2, v2, v3
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrglh2:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI7_0@toc@ha
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; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI7_0@toc@l
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; CHECK-NOVSX-NEXT: lvx v4, 0, r3
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; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 17, i32 0, i32 1, i32 18, i32 19, i32 2, i32 3, i32 20, i32 21, i32 4, i32 5, i32 22, i32 23, i32 6, i32 7>
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ret <16 x i8> %shuffle
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}
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define dso_local <16 x i8> @testmrghw(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrghw:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrghw v2, v3, v2
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrghw:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrghw v2, v3, v2
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrghw:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: vmrghw v2, v3, v2
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 8, i32 9, i32 10, i32 11, i32 24, i32 25, i32 26, i32 27, i32 12, i32 13, i32 14, i32 15, i32 28, i32 29, i32 30, i32 31>
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ret <16 x i8> %shuffle
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}
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define dso_local <16 x i8> @testmrghw2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrghw2:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrghw v2, v2, v3
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrghw2:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrghw v2, v2, v3
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrghw2:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI9_0@toc@ha
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; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI9_0@toc@l
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; CHECK-NOVSX-NEXT: lvx v4, 0, r3
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; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 24, i32 25, i32 26, i32 27, i32 8, i32 9, i32 10, i32 11, i32 28, i32 29, i32 30, i32 31, i32 12, i32 13, i32 14, i32 15>
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ret <16 x i8> %shuffle
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}
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define dso_local <16 x i8> @testmrglw(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrglw:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrglw v2, v3, v2
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrglw:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrglw v2, v3, v2
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrglw:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: vmrglw v2, v3, v2
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 16, i32 17, i32 18, i32 19, i32 4, i32 5, i32 6, i32 7, i32 20, i32 21, i32 22, i32 23>
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ret <16 x i8> %shuffle
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}
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define dso_local <16 x i8> @testmrglw2(<16 x i8> %a, <16 x i8> %b) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrglw2:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: vmrglw v2, v2, v3
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrglw2:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: vmrglw v2, v2, v3
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrglw2:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI11_0@toc@ha
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; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI11_0@toc@l
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; CHECK-NOVSX-NEXT: lvx v4, 0, r3
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; CHECK-NOVSX-NEXT: vperm v2, v3, v2, v4
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; CHECK-NOVSX-NEXT: blr
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entry:
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%shuffle = shufflevector <16 x i8> %a, <16 x i8> %b, <16 x i32> <i32 16, i32 17, i32 18, i32 19, i32 0, i32 1, i32 2, i32 3, i32 20, i32 21, i32 22, i32 23, i32 4, i32 5, i32 6, i32 7>
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ret <16 x i8> %shuffle
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}
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define dso_local <8 x i16> @testmrglb3(<8 x i8>* nocapture readonly %a) local_unnamed_addr #0 {
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; CHECK-P8-LABEL: testmrglb3:
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; CHECK-P8: # %bb.0: # %entry
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; CHECK-P8-NEXT: ld r3, 0(r3)
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; CHECK-P8-NEXT: xxlxor v2, v2, v2
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; CHECK-P8-NEXT: mtvsrd v3, r3
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; CHECK-P8-NEXT: vmrghb v2, v2, v3
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; CHECK-P8-NEXT: blr
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;
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; CHECK-P9-LABEL: testmrglb3:
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; CHECK-P9: # %bb.0: # %entry
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; CHECK-P9-NEXT: lxsd v2, 0(r3)
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; CHECK-P9-NEXT: xxlxor v3, v3, v3
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; CHECK-P9-NEXT: vmrghb v2, v3, v2
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; CHECK-P9-NEXT: blr
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;
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; CHECK-NOVSX-LABEL: testmrglb3:
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; CHECK-NOVSX: # %bb.0: # %entry
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; CHECK-NOVSX-NEXT: vxor v2, v2, v2
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; CHECK-NOVSX-NEXT: ld r3, 0(r3)
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; CHECK-NOVSX-NEXT: addis r4, r2, .LCPI12_0@toc@ha
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; CHECK-NOVSX-NEXT: addi r4, r4, .LCPI12_0@toc@l
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; CHECK-NOVSX-NEXT: lvx v3, 0, r4
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; CHECK-NOVSX-NEXT: std r3, -16(r1)
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; CHECK-NOVSX-NEXT: addi r3, r1, -16
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; CHECK-NOVSX-NEXT: lvx v4, 0, r3
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; CHECK-NOVSX-NEXT: vperm v2, v4, v2, v3
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; CHECK-NOVSX-NEXT: blr
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entry:
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%0 = load <8 x i8>, <8 x i8>* %a, align 8
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%1 = zext <8 x i8> %0 to <8 x i16>
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ret <8 x i16> %1
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}
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define dso_local void @no_crash_elt0_from_RHS(<2 x double>* noalias nocapture dereferenceable(16) %.vtx6) #0 {
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; CHECK-P8-LABEL: no_crash_elt0_from_RHS:
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; CHECK-P8: # %bb.0: # %test_entry
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; CHECK-P8-NEXT: mflr r0
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; CHECK-P8-NEXT: std r30, -16(r1) # 8-byte Folded Spill
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; CHECK-P8-NEXT: std r0, 16(r1)
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; CHECK-P8-NEXT: stdu r1, -48(r1)
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; CHECK-P8-NEXT: mr r30, r3
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; CHECK-P8-NEXT: bl dummy
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; CHECK-P8-NEXT: nop
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; CHECK-P8-NEXT: xxlxor f0, f0, f0
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; CHECK-P8-NEXT: # kill: def $f1 killed $f1 def $vsl1
|
|
; CHECK-P8-NEXT: xxmrghd vs0, vs1, vs0
|
|
; CHECK-P8-NEXT: xxswapd vs0, vs0
|
|
; CHECK-P8-NEXT: stxvd2x vs0, 0, r30
|
|
;
|
|
; CHECK-P9-LABEL: no_crash_elt0_from_RHS:
|
|
; CHECK-P9: # %bb.0: # %test_entry
|
|
; CHECK-P9-NEXT: mflr r0
|
|
; CHECK-P9-NEXT: std r30, -16(r1) # 8-byte Folded Spill
|
|
; CHECK-P9-NEXT: std r0, 16(r1)
|
|
; CHECK-P9-NEXT: stdu r1, -48(r1)
|
|
; CHECK-P9-NEXT: mr r30, r3
|
|
; CHECK-P9-NEXT: bl dummy
|
|
; CHECK-P9-NEXT: nop
|
|
; CHECK-P9-NEXT: xxlxor f0, f0, f0
|
|
; CHECK-P9-NEXT: # kill: def $f1 killed $f1 def $vsl1
|
|
; CHECK-P9-NEXT: xxmrghd vs0, vs1, vs0
|
|
; CHECK-P9-NEXT: stxv vs0, 0(r30)
|
|
;
|
|
; CHECK-NOVSX-LABEL: no_crash_elt0_from_RHS:
|
|
; CHECK-NOVSX: # %bb.0: # %test_entry
|
|
; CHECK-NOVSX-NEXT: mflr r0
|
|
; CHECK-NOVSX-NEXT: std r30, -16(r1) # 8-byte Folded Spill
|
|
; CHECK-NOVSX-NEXT: std r0, 16(r1)
|
|
; CHECK-NOVSX-NEXT: stdu r1, -48(r1)
|
|
; CHECK-NOVSX-NEXT: mr r30, r3
|
|
; CHECK-NOVSX-NEXT: bl dummy
|
|
; CHECK-NOVSX-NEXT: nop
|
|
; CHECK-NOVSX-NEXT: li r3, 0
|
|
; CHECK-NOVSX-NEXT: stfd f1, 8(r30)
|
|
; CHECK-NOVSX-NEXT: std r3, 0(r30)
|
|
test_entry:
|
|
%_div_result = tail call double @dummy()
|
|
%oldret = insertvalue { double, double } undef, double %_div_result, 0
|
|
%0 = extractvalue { double, double } %oldret, 0
|
|
%.splatinsert = insertelement <2 x double> undef, double %0, i32 0
|
|
%.splat = shufflevector <2 x double> %.splatinsert, <2 x double> undef, <2 x i32> zeroinitializer
|
|
%1 = shufflevector <2 x double> zeroinitializer, <2 x double> %.splat, <2 x i32> <i32 0, i32 3>
|
|
store <2 x double> %1, <2 x double>* %.vtx6, align 16
|
|
unreachable
|
|
}
|
|
|
|
define dso_local <4 x i32> @replace_undefs_in_splat(<4 x i32> %a) local_unnamed_addr #0 {
|
|
; CHECK-P8-LABEL: replace_undefs_in_splat:
|
|
; CHECK-P8: # %bb.0: # %entry
|
|
; CHECK-P8-NEXT: addis r3, r2, .LCPI14_0@toc@ha
|
|
; CHECK-P8-NEXT: addi r3, r3, .LCPI14_0@toc@l
|
|
; CHECK-P8-NEXT: lvx v3, 0, r3
|
|
; CHECK-P8-NEXT: vmrgow v2, v3, v2
|
|
; CHECK-P8-NEXT: blr
|
|
;
|
|
; CHECK-P9-LABEL: replace_undefs_in_splat:
|
|
; CHECK-P9: # %bb.0: # %entry
|
|
; CHECK-P9-NEXT: addis r3, r2, .LCPI14_0@toc@ha
|
|
; CHECK-P9-NEXT: addi r3, r3, .LCPI14_0@toc@l
|
|
; CHECK-P9-NEXT: lxvx v3, 0, r3
|
|
; CHECK-P9-NEXT: vmrgow v2, v3, v2
|
|
; CHECK-P9-NEXT: blr
|
|
;
|
|
; CHECK-NOVSX-LABEL: replace_undefs_in_splat:
|
|
; CHECK-NOVSX: # %bb.0: # %entry
|
|
; CHECK-NOVSX-NEXT: addis r3, r2, .LCPI14_0@toc@ha
|
|
; CHECK-NOVSX-NEXT: addis r4, r2, .LCPI14_1@toc@ha
|
|
; CHECK-NOVSX-NEXT: addi r3, r3, .LCPI14_0@toc@l
|
|
; CHECK-NOVSX-NEXT: lvx v3, 0, r3
|
|
; CHECK-NOVSX-NEXT: addi r3, r4, .LCPI14_1@toc@l
|
|
; CHECK-NOVSX-NEXT: lvx v4, 0, r3
|
|
; CHECK-NOVSX-NEXT: vperm v2, v4, v2, v3
|
|
; CHECK-NOVSX-NEXT: blr
|
|
entry:
|
|
%vecins1 = shufflevector <4 x i32> %a, <4 x i32> <i32 undef, i32 566, i32 undef, i32 566>, <4 x i32> <i32 0, i32 5, i32 2, i32 7>
|
|
ret <4 x i32> %vecins1
|
|
}
|
|
|
|
declare double @dummy() local_unnamed_addr
|
|
attributes #0 = { nounwind }
|