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cd0b5e8976
To make sure that no barrier gets placed on the architectural execution path, each BLR x<N> instruction gets transformed to a BL __llvm_slsblr_thunk_x<N> instruction, with __llvm_slsblr_thunk_x<N> a thunk that contains __llvm_slsblr_thunk_x<N>: BR x<N> <speculation barrier> Therefore, the BLR instruction gets split into 2; one BL and one BR. This transformation results in not inserting a speculation barrier on the architectural execution path. The mitigation is off by default and can be enabled by the harden-sls-blr subtarget feature. As a linker is allowed to clobber X16 and X17 on function calls, the above code transformation would not be correct in case a linker does so when N=16 or N=17. Therefore, when the mitigation is enabled, generation of BLR x16 or BLR x17 is avoided. As BLRA* indirect calls are not produced by LLVM currently, this does not aim to implement support for those. Differential Revision: https://reviews.llvm.org/D81402
78 lines
3.4 KiB
LLVM
78 lines
3.4 KiB
LLVM
; RUN: llc --debugify-and-strip-all-safe=0 -mtriple=arm64-- -O0 -debug-pass=Structure < %s -o /dev/null 2>&1 | \
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; RUN: grep -v "Verify generated machine code" | FileCheck %s
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; REQUIRES: asserts
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; CHECK-LABEL: Pass Arguments:
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; CHECK-NEXT: Target Library Information
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; CHECK-NEXT: Target Pass Configuration
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; CHECK-NEXT: Machine Module Information
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; CHECK-NEXT: Target Transform Information
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; CHECK-NEXT: Create Garbage Collector Module Metadata
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; CHECK-NEXT: Assumption Cache Tracker
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; CHECK-NEXT: Profile summary info
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; CHECK-NEXT: Machine Branch Probability Analysis
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; CHECK-NEXT: ModulePass Manager
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; CHECK-NEXT: Pre-ISel Intrinsic Lowering
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; CHECK-NEXT: FunctionPass Manager
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; CHECK-NEXT: Expand Atomic instructions
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; CHECK-NEXT: Module Verifier
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; CHECK-NEXT: Lower Garbage Collection Instructions
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; CHECK-NEXT: Shadow Stack GC Lowering
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; CHECK-NEXT: Lower constant intrinsics
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; CHECK-NEXT: Remove unreachable blocks from the CFG
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; CHECK-NEXT: Instrument function entry/exit with calls to e.g. mcount() (post inlining)
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; CHECK-NEXT: Scalarize Masked Memory Intrinsics
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; CHECK-NEXT: Expand reduction intrinsics
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; CHECK-NEXT: AArch64 Stack Tagging
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; CHECK-NEXT: Rewrite Symbols
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; CHECK-NEXT: FunctionPass Manager
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; CHECK-NEXT: Exception handling preparation
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; CHECK-NEXT: Safe Stack instrumentation pass
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; CHECK-NEXT: Insert stack protectors
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; CHECK-NEXT: Module Verifier
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; CHECK-NEXT: Analysis containing CSE Info
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; CHECK-NEXT: IRTranslator
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; CHECK-NEXT: Analysis for ComputingKnownBits
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; CHECK-NEXT: AArch64PreLegalizerCombiner
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; CHECK-NEXT: Analysis containing CSE Info
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; CHECK-NEXT: Legalizer
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; CHECK-NEXT: RegBankSelect
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; CHECK-NEXT: Localizer
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; CHECK-NEXT: Analysis for ComputingKnownBits
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; CHECK-NEXT: InstructionSelect
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; CHECK-NEXT: ResetMachineFunction
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; CHECK-NEXT: AArch64 Instruction Selection
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; CHECK-NEXT: Finalize ISel and expand pseudo-instructions
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; CHECK-NEXT: Local Stack Slot Allocation
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; CHECK-NEXT: Eliminate PHI nodes for register allocation
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; CHECK-NEXT: Two-Address instruction pass
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; CHECK-NEXT: Fast Register Allocator
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; CHECK-NEXT: Fixup Statepoint Caller Saved
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Optimization Remark Emitter
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; CHECK-NEXT: Prologue/Epilogue Insertion & Frame Finalization
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; CHECK-NEXT: Post-RA pseudo instruction expansion pass
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; CHECK-NEXT: AArch64 pseudo instruction expansion pass
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; CHECK-NEXT: AArch64 speculation hardening pass
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; CHECK-NEXT: AArch64 Indirect Thunks
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; CHECK-NEXT: AArch64 sls hardening pass
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; CHECK-NEXT: Analyze Machine Code For Garbage Collection
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; CHECK-NEXT: Insert fentry calls
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; CHECK-NEXT: Insert XRay ops
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; CHECK-NEXT: Implement the 'patchable-function' attribute
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; CHECK-NEXT: AArch64 Branch Targets
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; CHECK-NEXT: Branch relaxation pass
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; CHECK-NEXT: Unpack machine instruction bundles
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; CHECK-NEXT: Contiguously Lay Out Funclets
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; CHECK-NEXT: StackMap Liveness Analysis
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; CHECK-NEXT: Live DEBUG_VALUE analysis
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; CHECK-NEXT: Lazy Machine Block Frequency Analysis
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; CHECK-NEXT: Machine Optimization Remark Emitter
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; CHECK-NEXT: AArch64 Assembly Printer
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; CHECK-NEXT: Free MachineFunction
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define void @f() {
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ret void
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}
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