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1bb14916f2
This is the main CodeGen patch to support the arm64_32 watchOS ABI in LLVM. FastISel is mostly disabled for now since it would generate incorrect code for ILP32. llvm-svn: 371722
45 lines
1.2 KiB
LLVM
45 lines
1.2 KiB
LLVM
; RUN: llc -mtriple=arm64_32-apple-ios %s -o - | FileCheck %s
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; If %base < 96 then the sum will not wrap (in an unsigned sense), but "ldr w0,
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; [x0, #-96]" would.
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define i32 @test_valid_wrap(i32 %base) {
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; CHECK-LABEL: test_valid_wrap:
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; CHECK: sub w[[ADDR:[0-9]+]], w0, #96
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; CHECK: ldr w0, [x[[ADDR]]]
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%newaddr = add nuw i32 %base, -96
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%ptr = inttoptr i32 %newaddr to i32*
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%val = load i32, i32* %ptr
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ret i32 %val
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}
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define i8 @test_valid_wrap_optimizable(i8* %base) {
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; CHECK-LABEL: test_valid_wrap_optimizable:
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; CHECK: ldurb w0, [x0, #-96]
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%newaddr = getelementptr inbounds i8, i8* %base, i32 -96
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%val = load i8, i8* %newaddr
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ret i8 %val
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}
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define i8 @test_valid_wrap_optimizable1(i8* %base, i32 %offset) {
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; CHECK-LABEL: test_valid_wrap_optimizable1:
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; CHECK: ldrb w0, [x0, w1, sxtw]
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%newaddr = getelementptr inbounds i8, i8* %base, i32 %offset
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%val = load i8, i8* %newaddr
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ret i8 %val
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}
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;
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define i8 @test_valid_wrap_optimizable2(i8* %base, i32 %offset) {
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; CHECK-LABEL: test_valid_wrap_optimizable2:
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; CHECK: sxtw x[[OFFSET:[0-9]+]], w1
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; CHECK: mov w[[BASE:[0-9]+]], #-100
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; CHECK: ldrb w0, [x[[OFFSET]], x[[BASE]]]
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%newaddr = getelementptr inbounds i8, i8* inttoptr(i32 -100 to i8*), i32 %offset
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%val = load i8, i8* %newaddr
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ret i8 %val
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}
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