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a70016c8d5
Add the scratch wave offset to the scratch buffer descriptor (SRSrc) in the entry function prologue. This allows us to removes the scratch wave offset register from the calling convention ABI. As part of this change, allow the use of an inline constant zero for the SOffset of MUBUF instructions accessing the stack in entry functions when a frame pointer is not requested/required. Entry functions with calls still need to set up the calling convention ABI stack pointer register, and reference it in order to address arguments of called functions. The ABI stack pointer register remains unswizzled, but is now wave-relative instead of queue-relative. Non-entry functions also use an inline constant zero SOffset for wave-relative scratch access, but continue to use the stack and frame pointers as before. When the stack or frame pointer is converted to a swizzled offset it is now scaled directly, as the scratch wave offset no longer needs to be subtracted first. Update llvm/docs/AMDGPUUsage.rst to reflect these changes to the calling convention. Tags: #llvm Differential Revision: https://reviews.llvm.org/D75138
243 lines
10 KiB
LLVM
243 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -mattr=-unaligned-scratch-access < %s | FileCheck -check-prefixes=GCN,GFX7-ALIGNED %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -mattr=+unaligned-scratch-access < %s | FileCheck -check-prefixes=GCN,GFX7-UNALIGNED %s
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; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -mattr=+unaligned-scratch-access < %s | FileCheck -check-prefixes=GCN,GFX9 %s
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; Should not merge this to a dword load
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define i32 @private_load_2xi16_align2(i16 addrspace(5)* %p) #0 {
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; GFX7-ALIGNED-LABEL: private_load_2xi16_align2:
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; GFX7-ALIGNED: ; %bb.0:
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-ALIGNED-NEXT: v_add_i32_e32 v1, vcc, 2, v0
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; GFX7-ALIGNED-NEXT: buffer_load_ushort v0, v0, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: buffer_load_ushort v1, v1, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0)
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; GFX7-ALIGNED-NEXT: v_lshlrev_b32_e32 v1, 16, v1
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; GFX7-ALIGNED-NEXT: v_or_b32_e32 v0, v0, v1
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; GFX7-ALIGNED-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX7-UNALIGNED-LABEL: private_load_2xi16_align2:
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; GFX7-UNALIGNED: ; %bb.0:
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; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-UNALIGNED-NEXT: v_add_i32_e32 v1, vcc, 2, v0
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; GFX7-UNALIGNED-NEXT: buffer_load_ushort v0, v0, s[0:3], 0 offen
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; GFX7-UNALIGNED-NEXT: buffer_load_ushort v1, v1, s[0:3], 0 offen
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; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0)
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; GFX7-UNALIGNED-NEXT: v_lshlrev_b32_e32 v1, 16, v1
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; GFX7-UNALIGNED-NEXT: v_or_b32_e32 v0, v0, v1
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; GFX7-UNALIGNED-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: private_load_2xi16_align2:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: buffer_load_ushort v1, v0, s[0:3], 0 offen
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; GFX9-NEXT: buffer_load_ushort v0, v0, s[0:3], 0 offen offset:2
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_lshl_or_b32 v0, v0, 16, v1
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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%gep.p = getelementptr i16, i16 addrspace(5)* %p, i64 1
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%p.0 = load i16, i16 addrspace(5)* %p, align 2
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%p.1 = load i16, i16 addrspace(5)* %gep.p, align 2
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%zext.0 = zext i16 %p.0 to i32
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%zext.1 = zext i16 %p.1 to i32
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%shl.1 = shl i32 %zext.1, 16
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%or = or i32 %zext.0, %shl.1
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ret i32 %or
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}
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; Should not merge this to a dword store
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define void @private_store_2xi16_align2(i16 addrspace(5)* %p, i16 addrspace(5)* %r) #0 {
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; GFX7-ALIGNED-LABEL: private_store_2xi16_align2:
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; GFX7-ALIGNED: ; %bb.0:
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v3, 1
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; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, 2
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; GFX7-ALIGNED-NEXT: v_add_i32_e32 v2, vcc, 2, v1
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; GFX7-ALIGNED-NEXT: buffer_store_short v3, v1, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: buffer_store_short v0, v2, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0)
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; GFX7-ALIGNED-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX7-UNALIGNED-LABEL: private_store_2xi16_align2:
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; GFX7-UNALIGNED: ; %bb.0:
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; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v3, 1
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; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v0, 2
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; GFX7-UNALIGNED-NEXT: v_add_i32_e32 v2, vcc, 2, v1
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; GFX7-UNALIGNED-NEXT: buffer_store_short v3, v1, s[0:3], 0 offen
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; GFX7-UNALIGNED-NEXT: buffer_store_short v0, v2, s[0:3], 0 offen
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; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0)
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; GFX7-UNALIGNED-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: private_store_2xi16_align2:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 1
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; GFX9-NEXT: v_mov_b32_e32 v2, 2
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; GFX9-NEXT: buffer_store_short v0, v1, s[0:3], 0 offen
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; GFX9-NEXT: buffer_store_short v2, v1, s[0:3], 0 offen offset:2
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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%gep.r = getelementptr i16, i16 addrspace(5)* %r, i64 1
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store i16 1, i16 addrspace(5)* %r, align 2
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store i16 2, i16 addrspace(5)* %gep.r, align 2
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ret void
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}
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; Should produce align 1 dword when legal
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define i32 @private_load_2xi16_align1(i16 addrspace(5)* %p) #0 {
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; GFX7-ALIGNED-LABEL: private_load_2xi16_align1:
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; GFX7-ALIGNED: ; %bb.0:
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-ALIGNED-NEXT: v_add_i32_e32 v1, vcc, 2, v0
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; GFX7-ALIGNED-NEXT: v_add_i32_e32 v2, vcc, 1, v0
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; GFX7-ALIGNED-NEXT: buffer_load_ubyte v3, v0, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: v_add_i32_e32 v0, vcc, 3, v0
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; GFX7-ALIGNED-NEXT: buffer_load_ubyte v0, v0, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: buffer_load_ubyte v2, v2, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: buffer_load_ubyte v1, v1, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(2)
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; GFX7-ALIGNED-NEXT: v_lshlrev_b32_e32 v0, 8, v0
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(1)
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; GFX7-ALIGNED-NEXT: v_lshlrev_b32_e32 v2, 8, v2
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0)
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; GFX7-ALIGNED-NEXT: v_or_b32_e32 v0, v0, v1
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; GFX7-ALIGNED-NEXT: v_or_b32_e32 v2, v2, v3
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; GFX7-ALIGNED-NEXT: v_lshlrev_b32_e32 v0, 16, v0
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; GFX7-ALIGNED-NEXT: v_or_b32_e32 v0, v2, v0
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; GFX7-ALIGNED-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX7-UNALIGNED-LABEL: private_load_2xi16_align1:
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; GFX7-UNALIGNED: ; %bb.0:
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; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-UNALIGNED-NEXT: buffer_load_dword v0, v0, s[0:3], 0 offen
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; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0)
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; GFX7-UNALIGNED-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: private_load_2xi16_align1:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: buffer_load_dword v0, v0, s[0:3], 0 offen
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; GFX9-NEXT: v_mov_b32_e32 v1, 0xffff
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; GFX9-NEXT: s_mov_b32 s4, 0xffff
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_bfi_b32 v1, v1, 0, v0
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; GFX9-NEXT: v_and_or_b32 v0, v0, s4, v1
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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%gep.p = getelementptr i16, i16 addrspace(5)* %p, i64 1
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%p.0 = load i16, i16 addrspace(5)* %p, align 1
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%p.1 = load i16, i16 addrspace(5)* %gep.p, align 1
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%zext.0 = zext i16 %p.0 to i32
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%zext.1 = zext i16 %p.1 to i32
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%shl.1 = shl i32 %zext.1, 16
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%or = or i32 %zext.0, %shl.1
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ret i32 %or
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}
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; Should produce align 1 dword when legal
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define void @private_store_2xi16_align1(i16 addrspace(5)* %p, i16 addrspace(5)* %r) #0 {
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; GFX7-ALIGNED-LABEL: private_store_2xi16_align1:
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; GFX7-ALIGNED: ; %bb.0:
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v3, 1
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; GFX7-ALIGNED-NEXT: v_add_i32_e32 v2, vcc, 2, v1
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; GFX7-ALIGNED-NEXT: v_add_i32_e32 v4, vcc, 1, v1
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; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v5, 0
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; GFX7-ALIGNED-NEXT: buffer_store_byte v3, v1, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: buffer_store_byte v5, v4, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: v_add_i32_e32 v1, vcc, 3, v1
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; GFX7-ALIGNED-NEXT: v_mov_b32_e32 v0, 2
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; GFX7-ALIGNED-NEXT: buffer_store_byte v5, v1, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: buffer_store_byte v0, v2, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0)
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; GFX7-ALIGNED-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX7-UNALIGNED-LABEL: private_store_2xi16_align1:
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; GFX7-UNALIGNED: ; %bb.0:
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; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-UNALIGNED-NEXT: v_mov_b32_e32 v0, 0x20001
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; GFX7-UNALIGNED-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen
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; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0)
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; GFX7-UNALIGNED-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: private_store_2xi16_align1:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: v_mov_b32_e32 v0, 0x20001
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; GFX9-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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%gep.r = getelementptr i16, i16 addrspace(5)* %r, i64 1
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store i16 1, i16 addrspace(5)* %r, align 1
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store i16 2, i16 addrspace(5)* %gep.r, align 1
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ret void
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}
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; Should merge this to a dword load
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define i32 @private_load_2xi16_align4(i16 addrspace(5)* %p) #0 {
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; GFX7-LABEL: load_2xi16_align4:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-NEXT: flat_load_dword v0, v[0:1]
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; GFX7-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
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; GFX7-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX7-ALIGNED-LABEL: private_load_2xi16_align4:
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; GFX7-ALIGNED: ; %bb.0:
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-ALIGNED-NEXT: buffer_load_dword v0, v0, s[0:3], 0 offen
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; GFX7-ALIGNED-NEXT: s_waitcnt vmcnt(0)
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; GFX7-ALIGNED-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX7-UNALIGNED-LABEL: private_load_2xi16_align4:
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; GFX7-UNALIGNED: ; %bb.0:
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; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX7-UNALIGNED-NEXT: buffer_load_dword v0, v0, s[0:3], 0 offen
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; GFX7-UNALIGNED-NEXT: s_waitcnt vmcnt(0)
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; GFX7-UNALIGNED-NEXT: s_setpc_b64 s[30:31]
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;
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; GFX9-LABEL: private_load_2xi16_align4:
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; GFX9: ; %bb.0:
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; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GFX9-NEXT: buffer_load_dword v0, v0, s[0:3], 0 offen
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; GFX9-NEXT: v_mov_b32_e32 v1, 0xffff
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; GFX9-NEXT: s_mov_b32 s4, 0xffff
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; GFX9-NEXT: s_waitcnt vmcnt(0)
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; GFX9-NEXT: v_bfi_b32 v1, v1, 0, v0
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; GFX9-NEXT: v_and_or_b32 v0, v0, s4, v1
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; GFX9-NEXT: s_setpc_b64 s[30:31]
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%gep.p = getelementptr i16, i16 addrspace(5)* %p, i64 1
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%p.0 = load i16, i16 addrspace(5)* %p, align 4
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%p.1 = load i16, i16 addrspace(5)* %gep.p, align 2
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%zext.0 = zext i16 %p.0 to i32
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%zext.1 = zext i16 %p.1 to i32
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%shl.1 = shl i32 %zext.1, 16
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%or = or i32 %zext.0, %shl.1
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ret i32 %or
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}
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; Should merge this to a dword store
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define void @private_store_2xi16_align4(i16 addrspace(5)* %p, i16 addrspace(5)* %r) #0 {
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; GFX7-LABEL: private_store_2xi16_align4:
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; GFX7: ; %bb.0:
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; GFX7-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
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; GFX7-NEXT: v_mov_b32_e32 v2, 0x20001
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; GFX7-NEXT: s_waitcnt lgkmcnt(0)
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; GFX7-NEXT: v_mov_b32_e32 v0, s0
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; GFX7-NEXT: v_mov_b32_e32 v1, s1
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; GFX7-NEXT: flat_store_dword v[0:1], v2
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; GFX7-NEXT: s_endpgm
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;
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; GCN-LABEL: private_store_2xi16_align4:
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; GCN: ; %bb.0:
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; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
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; GCN-NEXT: v_mov_b32_e32 v0, 0x20001
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; GCN-NEXT: buffer_store_dword v0, v1, s[0:3], 0 offen
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; GCN-NEXT: s_waitcnt vmcnt(0)
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; GCN-NEXT: s_setpc_b64 s[30:31]
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%gep.r = getelementptr i16, i16 addrspace(5)* %r, i64 1
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store i16 1, i16 addrspace(5)* %r, align 4
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store i16 2, i16 addrspace(5)* %gep.r, align 2
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ret void
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}
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