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f04f5a9778
Summary: For the case where "done" bits on existing exports are removed by unifyReturnBlockSet(), unify all return blocks - even the uniformly reached ones. We do not want to end up with a non-unified, uniformly reached block containing a normal export with the "done" bit cleared. That case is believed to be rare - possible with infinite loops in pixel shaders. This is a fix for D71192. Subscribers: arsenm, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D76364
39 lines
1.5 KiB
LLVM
39 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
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; RUN: opt -mtriple=amdgcn-- -S -amdgpu-unify-divergent-exit-nodes -verify %s | FileCheck -check-prefix=IR %s
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; Make sure that the phi in n28 is updated when the block is split by unify
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; divergent exit nodes.
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define amdgpu_ps void @_amdgpu_ps_main() local_unnamed_addr #3 {
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; IR-LABEL: @_amdgpu_ps_main(
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; IR-NEXT: .entry:
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; IR-NEXT: br label [[DOTLOOPEXIT:%.*]]
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; IR: .loopexit:
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; IR-NEXT: br label [[N28:%.*]]
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; IR: n28:
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; IR-NEXT: [[DOT01:%.*]] = phi float [ 0.000000e+00, [[DOTLOOPEXIT]] ], [ [[N29:%.*]], [[TRANSITIONBLOCK:%.*]] ]
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; IR-NEXT: [[N29]] = fadd float [[DOT01]], 1.000000e+00
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; IR-NEXT: [[N30:%.*]] = fcmp ogt float [[N29]], 4.000000e+00
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; IR-NEXT: br i1 true, label [[TRANSITIONBLOCK]], label [[UNIFIEDRETURNBLOCK:%.*]]
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; IR: TransitionBlock:
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; IR-NEXT: br i1 [[N30]], label [[DOTLOOPEXIT]], label [[N28]]
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; IR: UnifiedReturnBlock:
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; IR-NEXT: call void @llvm.amdgcn.exp.f32(i32 9, i32 0, float undef, float undef, float undef, float undef, i1 true, i1 true)
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; IR-NEXT: ret void
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;
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.entry:
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br label %.loopexit
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.loopexit: ; preds = %n28, %.entry
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br label %n28
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n28: ; preds = %.loopexit, %n28
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%.01 = phi float [ 0.000000e+00, %.loopexit ], [ %n29, %n28 ]
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%n29 = fadd float %.01, 1.0
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%n30 = fcmp ogt float %n29, 4.000000e+00
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br i1 %n30, label %.loopexit, label %n28
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n31: ; preds =
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ret void
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}
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