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59de807f62
This is the groundwork required to implement strictfp. For now, this should be NFC for regular instructoins (many instructions just gain an extra use of a reserved register). Regalloc won't rematerialize instructions with reads of physical registers, but we were suffering from that anyway with the exec reads. Should add it for all the related FP uses (possibly with some extras). I did not add it to either the gpr index mode instructions (or every single VALU instruction) since it's a ridiculous feature already modeled as an arbitrary side effect. Also work towards marking instructions with FP exceptions. This doesn't actually set the bit yet since this would start to change codegen. It seems nofpexcept is currently not implied from the regular IR FP operations. Add it to some MIR tests where I think it might matter.
146 lines
4.7 KiB
YAML
146 lines
4.7 KiB
YAML
# RUN: llc -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs -run-pass si-insert-skips,post-RA-hazard-rec -o - %s | FileCheck -check-prefix=GCN %s
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# GCN-LABEL: name: hazard_vcmpx_permlane16
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# GCN: V_CMPX_LE_F32_nosdst_e32
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# GCN: S_ADD_U32
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# GCN-NEXT: $vgpr1 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
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# GCN-NEXT: V_PERMLANE16_B32
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---
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name: hazard_vcmpx_permlane16
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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SI_KILL_F32_COND_IMM_TERMINATOR $vgpr0, 0, 3, implicit-def $exec, implicit-def $vcc, implicit-def $scc, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = IMPLICIT_DEF
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$vgpr2 = IMPLICIT_DEF
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$sgpr0 = IMPLICIT_DEF
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$sgpr1 = S_ADD_U32 $sgpr0, 0, implicit-def $scc
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$vgpr1 = V_PERMLANE16_B32 0, killed $vgpr1, 0, killed $sgpr1, 0, killed $sgpr0, $vgpr1, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_vcmpx_permlanex16
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# GCN: V_CMPX_LE_F32_nosdst_e32
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# GCN: $vgpr1 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
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# GCN-NEXT: V_PERMLANEX16_B32
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---
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name: hazard_vcmpx_permlanex16
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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SI_KILL_F32_COND_IMM_TERMINATOR $vgpr0, 0, 3, implicit-def $exec, implicit-def $vcc, implicit-def $scc, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = IMPLICIT_DEF
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$vgpr2 = IMPLICIT_DEF
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$sgpr0 = IMPLICIT_DEF
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$sgpr1 = IMPLICIT_DEF
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$vgpr1 = V_PERMLANEX16_B32 0, killed $vgpr1, 0, killed $sgpr1, 0, killed $sgpr0, $vgpr1, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_vcmpx_permlane16_v_nop
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# GCN: V_CMPX_LE_F32_nosdst_e32
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# GCN: V_NOP
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# GCN-NEXT: $vgpr1 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
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# GCN-NEXT: V_PERMLANE16_B32
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---
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name: hazard_vcmpx_permlane16_v_nop
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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SI_KILL_F32_COND_IMM_TERMINATOR $vgpr0, 0, 3, implicit-def $exec, implicit-def $vcc, implicit-def $scc, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = IMPLICIT_DEF
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$vgpr2 = IMPLICIT_DEF
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$sgpr0 = IMPLICIT_DEF
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$sgpr1 = IMPLICIT_DEF
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V_NOP_e32 implicit $exec
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$vgpr1 = V_PERMLANE16_B32 0, killed $vgpr1, 0, killed $sgpr1, 0, killed $sgpr0, $vgpr1, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_vcmpx_permlane16_far
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# GCN: V_CMPX_LE_F32_nosdst_e32
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# GCN: $vgpr1 = V_MOV_B32_e32 killed $vgpr1, implicit $exec
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# GCN-NEXT: V_PERMLANE16_B32
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---
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name: hazard_vcmpx_permlane16_far
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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SI_KILL_F32_COND_IMM_TERMINATOR $vgpr0, 0, 3, implicit-def $exec, implicit-def $vcc, implicit-def $scc, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = IMPLICIT_DEF
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$vgpr2 = IMPLICIT_DEF
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$sgpr0 = IMPLICIT_DEF
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$sgpr1 = IMPLICIT_DEF
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V_NOP_e32 implicit $exec
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V_NOP_e32 implicit $exec
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V_NOP_e32 implicit $exec
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V_NOP_e32 implicit $exec
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V_NOP_e32 implicit $exec
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V_NOP_e32 implicit $exec
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V_NOP_e32 implicit $exec
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V_NOP_e32 implicit $exec
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V_NOP_e32 implicit $exec
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$vgpr1 = V_PERMLANE16_B32 0, killed $vgpr1, 0, killed $sgpr1, 0, killed $sgpr0, $vgpr1, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_vcmpx_permlane16_no_hazard
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# GCN: V_CMPX_LE_F32_nosdst_e32
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# GCN: V_ADD_F32
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# GCN-NEXT: V_PERMLANE16_B32
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---
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name: hazard_vcmpx_permlane16_no_hazard
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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SI_KILL_F32_COND_IMM_TERMINATOR $vgpr0, 0, 3, implicit-def $exec, implicit-def $vcc, implicit-def $scc, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr1 = IMPLICIT_DEF
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$sgpr0 = IMPLICIT_DEF
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$sgpr1 = IMPLICIT_DEF
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$vgpr2 = V_ADD_F32_e32 $vgpr1, $vgpr1, implicit $mode, implicit $exec
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$vgpr1 = V_PERMLANE16_B32 0, killed $vgpr1, 0, killed $sgpr1, 0, killed $sgpr0, $vgpr1, 0, implicit $exec
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S_ENDPGM 0
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...
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# GCN-LABEL: name: hazard_vcmpx_permlane16_undef_src
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# GCN: V_CMPX_LE_F32_nosdst_e32
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# GCN: S_ADD_U32
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# GCN-NEXT: dead $vgpr1 = V_MOV_B32_e32 undef $vgpr1, implicit $exec
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# GCN-NEXT: V_PERMLANE16_B32
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---
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name: hazard_vcmpx_permlane16_undef_src
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body: |
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bb.0:
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successors: %bb.1
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$vgpr0 = V_MOV_B32_e32 0, implicit $exec
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SI_KILL_F32_COND_IMM_TERMINATOR $vgpr0, 0, 3, implicit-def $exec, implicit-def $vcc, implicit-def $scc, implicit $exec
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S_BRANCH %bb.1
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bb.1:
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$vgpr2 = IMPLICIT_DEF
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$sgpr0 = IMPLICIT_DEF
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$sgpr1 = S_ADD_U32 $sgpr0, 0, implicit-def $scc
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$vgpr1 = V_PERMLANE16_B32 0, undef $vgpr1, 0, killed $sgpr1, 0, killed $sgpr0, undef $vgpr1, 0, implicit $exec
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S_ENDPGM 0
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...
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