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50f1e24f05
Summary: Modify lea/load/store instructions to accept `disp(index, base)` style addressing mode (called ASX format). Also, uniform the number of DAG nodes to have 3 operands for this ASX format instructions, and update selectADDR functions to lower appropriate MI. Reviewers: arsenm, simoll, k-ishizaka Reviewed By: simoll Differential Revision: https://reviews.llvm.org/D76822
37 lines
1.2 KiB
LLVM
37 lines
1.2 KiB
LLVM
; RUN: llc -relocation-model=pic < %s -mtriple=ve-unknown-unknown | FileCheck %s
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@dst = external global i32, align 4
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@ptr = external global i32*, align 8
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@src = external global i32, align 4
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define i32 @func() {
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; CHECK-LABEL: func:
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; CHECK: .LBB{{[0-9]+}}_2:
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; CHECK-NEXT: lea %s15, _GLOBAL_OFFSET_TABLE_@pc_lo(-24)
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; CHECK-NEXT: and %s15, %s15, (32)0
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; CHECK-NEXT: sic %s16
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; CHECK-NEXT: lea.sl %s15, _GLOBAL_OFFSET_TABLE_@pc_hi(%s16, %s15)
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; CHECK-NEXT: lea %s0, dst@got_lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea.sl %s0, dst@got_hi(, %s0)
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; CHECK-NEXT: ld %s1, (%s0, %s15)
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; CHECK-NEXT: lea %s0, ptr@got_lo
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; CHECK-NEXT: and %s0, %s0, (32)0
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; CHECK-NEXT: lea %s2, src@got_lo
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; CHECK-NEXT: and %s2, %s2, (32)0
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; CHECK-NEXT: lea.sl %s2, src@got_hi(, %s2)
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; CHECK-NEXT: ld %s2, (%s2, %s15)
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; CHECK-NEXT: lea.sl %s0, ptr@got_hi(, %s0)
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; CHECK-NEXT: ld %s0, (%s0, %s15)
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; CHECK-NEXT: ldl.sx %s2, (, %s2)
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; CHECK-NEXT: st %s1, (, %s0)
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; CHECK-NEXT: or %s0, 1, (0)1
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; CHECK-NEXT: stl %s2, (, %s1)
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; CHECK-NEXT: or %s11, 0, %s9
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store i32* @dst, i32** @ptr, align 8
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%1 = load i32, i32* @src, align 4
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store i32 %1, i32* @dst, align 4
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ret i32 1
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}
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