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2a3fc0c8b2
Context: https://github.com/WebAssembly/memory64/blob/master/proposals/memory64/Overview.md This is just a first step, adding the new instruction variants while keeping the existing 32-bit functionality working. Some of the basic load/store tests have new wasm64 versions that show that the basics of the target are working. Further features need implementation, but these will be added in followups to keep things reviewable. Differential Revision: https://reviews.llvm.org/D80769
95 lines
2.4 KiB
LLVM
95 lines
2.4 KiB
LLVM
; RUN: llc < %s --mtriple=wasm32-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK32 %s
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; RUN: llc < %s --mtriple=wasm64-unknown-unknown -asm-verbose=false -disable-wasm-fallthrough-return-opt -wasm-disable-explicit-locals -wasm-keep-registers | FileCheck --check-prefixes CHECK,CHK64 %s
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; Test that extending loads are assembled properly.
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; CHECK-LABEL: sext_i8_i32:
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; CHECK: i32.load8_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @sext_i8_i32(i8 *%p) {
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%v = load i8, i8* %p
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%e = sext i8 %v to i32
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ret i32 %e
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}
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; CHECK-LABEL: zext_i8_i32:
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; CHECK: i32.load8_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @zext_i8_i32(i8 *%p) {
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%v = load i8, i8* %p
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%e = zext i8 %v to i32
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ret i32 %e
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}
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; CHECK-LABEL: sext_i16_i32:
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; CHECK: i32.load16_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @sext_i16_i32(i16 *%p) {
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%v = load i16, i16* %p
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%e = sext i16 %v to i32
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ret i32 %e
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}
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; CHECK-LABEL: zext_i16_i32:
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; CHECK: i32.load16_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i32 @zext_i16_i32(i16 *%p) {
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%v = load i16, i16* %p
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%e = zext i16 %v to i32
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ret i32 %e
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}
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; CHECK-LABEL: sext_i8_i64:
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; CHECK: i64.load8_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @sext_i8_i64(i8 *%p) {
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%v = load i8, i8* %p
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%e = sext i8 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: zext_i8_i64:
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; CHECK: i64.load8_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @zext_i8_i64(i8 *%p) {
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%v = load i8, i8* %p
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%e = zext i8 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: sext_i16_i64:
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; CHECK: i64.load16_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @sext_i16_i64(i16 *%p) {
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%v = load i16, i16* %p
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%e = sext i16 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: zext_i16_i64:
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; CHECK: i64.load16_u $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @zext_i16_i64(i16 *%p) {
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%v = load i16, i16* %p
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%e = zext i16 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: sext_i32_i64:
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; CHECK: i64.load32_s $push0=, 0($0){{$}}
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; CHECK-NEXT: return $pop0{{$}}
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define i64 @sext_i32_i64(i32 *%p) {
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%v = load i32, i32* %p
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%e = sext i32 %v to i64
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ret i64 %e
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}
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; CHECK-LABEL: zext_i32_i64:
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; CHECK: i64.load32_u $push0=, 0($0){{$}}
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; CHECK: return $pop0{{$}}
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define i64 @zext_i32_i64(i32 *%p) {
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%v = load i32, i32* %p
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%e = zext i32 %v to i64
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ret i64 %e
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}
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