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af0734bc33
Before this instruction supported output values, it fit fairly naturally as a terminator. However, being a terminator while also supporting outputs causes some trouble, as the physreg->vreg COPY operations cannot be in the same block. Modeling it as a non-terminator allows it to be handled the same way as invoke is handled already. Most of the changes here were created by auditing all the existing users of MachineBasicBlock::isEHPad() and MachineBasicBlock::hasEHPadSuccessor(), and adding calls to isInlineAsmBrIndirectTarget or mayHaveInlineAsmBr, as appropriate. Reviewed By: nickdesaulniers, void Differential Revision: https://reviews.llvm.org/D79794
31 lines
725 B
LLVM
31 lines
725 B
LLVM
; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
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define i32 @test1(i32 %x) {
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; CHECK-LABEL: test1:
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; CHECK: .quad .Ltmp0
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; CHECK-NEXT: .quad .Ltmp1
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; CHECK: .Ltmp1:
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; CHECK-NEXT: # %bb.1: # %bar
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; CHECK-NEXT: callq foo
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; CHECK-NEXT: .Ltmp0:
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; CHECK-NEXT: # %bb.2: # %baz
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entry:
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callbr void asm sideeffect ".quad ${0:l}\0A\09.quad ${1:l}", "i,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %baz), i8* blockaddress(@test1, %bar))
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to label %asm.fallthrough [label %bar]
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asm.fallthrough:
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br label %bar
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bar:
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%call = tail call i32 @foo(i32 %x)
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br label %baz
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baz:
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%call1 = tail call i32 @mux(i32 %call)
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ret i32 %call1
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}
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declare i32 @foo(i32)
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declare i32 @mux(i32)
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