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llvm-mirror/test/CodeGen/X86/callbr-asm-label-addr.ll
James Y Knight af0734bc33 Change the INLINEASM_BR MachineInstr to be a non-terminating instruction.
Before this instruction supported output values, it fit fairly
naturally as a terminator. However, being a terminator while also
supporting outputs causes some trouble, as the physreg->vreg COPY
operations cannot be in the same block.

Modeling it as a non-terminator allows it to be handled the same way
as invoke is handled already.

Most of the changes here were created by auditing all the existing
users of MachineBasicBlock::isEHPad() and
MachineBasicBlock::hasEHPadSuccessor(), and adding calls to
isInlineAsmBrIndirectTarget or mayHaveInlineAsmBr, as appropriate.

Reviewed By: nickdesaulniers, void

Differential Revision: https://reviews.llvm.org/D79794
2020-07-01 12:51:50 -04:00

31 lines
725 B
LLVM

; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s
define i32 @test1(i32 %x) {
; CHECK-LABEL: test1:
; CHECK: .quad .Ltmp0
; CHECK-NEXT: .quad .Ltmp1
; CHECK: .Ltmp1:
; CHECK-NEXT: # %bb.1: # %bar
; CHECK-NEXT: callq foo
; CHECK-NEXT: .Ltmp0:
; CHECK-NEXT: # %bb.2: # %baz
entry:
callbr void asm sideeffect ".quad ${0:l}\0A\09.quad ${1:l}", "i,X,~{dirflag},~{fpsr},~{flags}"(i8* blockaddress(@test1, %baz), i8* blockaddress(@test1, %bar))
to label %asm.fallthrough [label %bar]
asm.fallthrough:
br label %bar
bar:
%call = tail call i32 @foo(i32 %x)
br label %baz
baz:
%call1 = tail call i32 @mux(i32 %call)
ret i32 %call1
}
declare i32 @foo(i32)
declare i32 @mux(i32)