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3f8e1773a5
64-bit MMX constant generation usually ends up lowering into SSE instructions before being spilled/reloaded as a MMX type. This patch bitcasts the constant to a double value to allow correct loading directly to the MMX register. I've added MMX constant asm comment support to improve testing, it's better to always print the double values as hex constants as MMX is mainly an integer unit (and even with 3DNow! its just floats). Differential Revision: https://reviews.llvm.org/D43616 llvm-svn: 326497
32 lines
962 B
LLVM
32 lines
962 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -O0 -mtriple=i686-apple-darwin9.8 -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X86
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; RUN: llc < %s -O0 -mtriple=x86_64-apple-darwin9.8 -mattr=+mmx,+sse2 | FileCheck %s --check-prefixes=X64
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; PR4684
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declare void @func2(x86_mmx)
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; This isn't spectacular, but it's MMX code at -O0...
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define void @func1() nounwind {
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; X86-LABEL: func1:
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; X86: ## %bb.0:
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; X86-NEXT: subl $12, %esp
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; X86-NEXT: movq LCPI0_0, %mm0 ## mm0 = 0x200000000
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; X86-NEXT: calll _func2
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; X86-NEXT: addl $12, %esp
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; X86-NEXT: retl
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;
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; X64-LABEL: func1:
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; X64: ## %bb.0:
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; X64-NEXT: pushq %rax
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; X64-NEXT: movq {{.*}}(%rip), %mm0 ## mm0 = 0x200000000
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; X64-NEXT: movq2dq %mm0, %xmm0
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; X64-NEXT: callq _func2
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; X64-NEXT: popq %rax
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; X64-NEXT: retq
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%tmp0 = bitcast <2 x i32> <i32 0, i32 2> to x86_mmx
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call void @func2(x86_mmx %tmp0)
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ret void
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}
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