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cfc854315e
This extends the code that handles 16-bit add promotion to form LEA to also allow 8-bit adds. That allows us to combine add ops with register moves and save some instructions. This is another step towards allowing add truncation in generic DAGCombiner (see D54640). Differential Revision: https://reviews.llvm.org/D55494 llvm-svn: 348946
18 lines
499 B
LLVM
18 lines
499 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=x86_64-- < %s | FileCheck %s
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define i2 @f(i32 %arg) {
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; CHECK-LABEL: f:
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; CHECK: # %bb.0:
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; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
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; CHECK-NEXT: leal (%rdi,%rdi), %eax
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; CHECK-NEXT: orb $1, %al
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; CHECK-NEXT: # kill: def $al killed $al killed $eax
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; CHECK-NEXT: retq
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%trunc = trunc i32 %arg to i1
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%sext = sext i1 %trunc to i2
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%or = or i2 %sext, 1
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ret i2 %or
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}
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