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30264d4391
As part of the unification of the debug format and the MIR format, print MBB references as '%bb.5'. The MIR printer prints the IR name of a MBB only for block definitions. * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)->getNumber\(\)/" << printMBBReference(*\1)/g' * find . \( -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#" << ([a-zA-Z0-9_]+)\.getNumber\(\)/" << printMBBReference(\1)/g' * find . \( -name "*.txt" -o -name "*.s" -o -name "*.mir" -o -name "*.cpp" -o -name "*.h" -o -name "*.ll" \) -type f -print0 | xargs -0 sed -i '' -E 's/BB#([0-9]+)/%bb.\1/g' * grep -nr 'BB#' and fix Differential Revision: https://reviews.llvm.org/D40422 llvm-svn: 319665
57 lines
1.8 KiB
LLVM
57 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mcpu=core-avx-i -mattr=+rdseed | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=core-avx-i -mattr=+rdseed | FileCheck %s --check-prefix=X64
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declare {i16, i32} @llvm.x86.rdseed.16()
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declare {i32, i32} @llvm.x86.rdseed.32()
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define i32 @_rdseed16_step(i16* %random_val) {
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; X86-LABEL: _rdseed16_step:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: rdseedw %ax
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; X86-NEXT: movzwl %ax, %edx
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; X86-NEXT: movl $1, %eax
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; X86-NEXT: cmovael %edx, %eax
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; X86-NEXT: movw %dx, (%ecx)
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; X86-NEXT: retl
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;
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; X64-LABEL: _rdseed16_step:
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; X64: # %bb.0:
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; X64-NEXT: rdseedw %ax
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; X64-NEXT: movzwl %ax, %ecx
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; X64-NEXT: movl $1, %eax
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; X64-NEXT: cmovael %ecx, %eax
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; X64-NEXT: movw %cx, (%rdi)
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; X64-NEXT: retq
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%call = call {i16, i32} @llvm.x86.rdseed.16()
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%randval = extractvalue {i16, i32} %call, 0
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store i16 %randval, i16* %random_val
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%isvalid = extractvalue {i16, i32} %call, 1
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ret i32 %isvalid
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}
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define i32 @_rdseed32_step(i32* %random_val) {
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; X86-LABEL: _rdseed32_step:
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; X86: # %bb.0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: rdseedl %edx
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; X86-NEXT: movl $1, %eax
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; X86-NEXT: cmovael %edx, %eax
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; X86-NEXT: movl %edx, (%ecx)
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; X86-NEXT: retl
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;
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; X64-LABEL: _rdseed32_step:
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; X64: # %bb.0:
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; X64-NEXT: rdseedl %ecx
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; X64-NEXT: movl $1, %eax
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; X64-NEXT: cmovael %ecx, %eax
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; X64-NEXT: movl %ecx, (%rdi)
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; X64-NEXT: retq
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%call = call {i32, i32} @llvm.x86.rdseed.32()
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%randval = extractvalue {i32, i32} %call, 0
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store i32 %randval, i32* %random_val
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%isvalid = extractvalue {i32, i32} %call, 1
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ret i32 %isvalid
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}
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