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7ed143a4a1
Printing floating point number in decimal is inconvenient for humans. Verbose asm output will print out floating point values in comments, it helps. But in lots of cases, users still need additional work to covert the decimal back to hex or binary to check the bit patterns, especially when there are small precision difference. Hexadecimal form is one of the supported form in LLVM IR, and easier for debugging. This patch try to print all FP constant in hex form instead. Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D73566
107 lines
4.1 KiB
LLVM
107 lines
4.1 KiB
LLVM
; Three variants of "MSVC" environments.
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; RUN: llc < %s -mattr=sse2 -mattr=avx | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-win32 -mattr=sse2 -mattr=avx | FileCheck %s
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; RUN: llc < %s -mtriple=x86_64-windows-msvc -mattr=sse2 -mattr=avx | FileCheck %s
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; GNU environment.
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; RUN: llc < %s -mtriple=x86_64-win32-gnu -mattr=sse2 -mattr=avx | FileCheck -check-prefix=MINGW %s
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target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-pc-win32"
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define double @double() {
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ret double 0x0000000000800000
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}
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; CHECK: .globl __real@0000000000800000
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; CHECK-NEXT: .section .rdata,"dr",discard,__real@0000000000800000
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; CHECK-NEXT: .p2align 3
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; CHECK-NEXT: __real@0000000000800000:
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; CHECK-NEXT: .quad 0x0000000000800000
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; CHECK: double:
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; CHECK: movsd __real@0000000000800000(%rip), %xmm0
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; CHECK-NEXT: ret
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; MINGW: .section .rdata,"dr"
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; MINGW-NEXT: .p2align 3
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; MINGW-NEXT: [[LABEL:\.LC.*]]:
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; MINGW-NEXT: .quad 0x0000000000800000
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; MINGW: double:
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; MINGW: movsd [[LABEL]](%rip), %xmm0
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; MINGW-NEXT: ret
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define <4 x i32> @vec1() {
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ret <4 x i32> <i32 3, i32 2, i32 1, i32 0>
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}
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; CHECK: .globl __xmm@00000000000000010000000200000003
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; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000000000000010000000200000003
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: __xmm@00000000000000010000000200000003:
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; CHECK-NEXT: .long 3
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; CHECK-NEXT: .long 2
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; CHECK-NEXT: .long 1
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; CHECK-NEXT: .long 0
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; CHECK: vec1:
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; CHECK: movaps __xmm@00000000000000010000000200000003(%rip), %xmm0
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; CHECK-NEXT: ret
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define <8 x i16> @vec2() {
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ret <8 x i16> <i16 7, i16 6, i16 5, i16 4, i16 3, i16 2, i16 1, i16 0>
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}
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; CHECK: .globl __xmm@00000001000200030004000500060007
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; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000001000200030004000500060007
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: __xmm@00000001000200030004000500060007:
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; CHECK-NEXT: .short 7
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; CHECK-NEXT: .short 6
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; CHECK-NEXT: .short 5
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; CHECK-NEXT: .short 4
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; CHECK-NEXT: .short 3
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; CHECK-NEXT: .short 2
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; CHECK-NEXT: .short 1
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; CHECK-NEXT: .short 0
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; CHECK: vec2:
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; CHECK: movaps __xmm@00000001000200030004000500060007(%rip), %xmm0
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; CHECK-NEXT: ret
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define <4 x float> @undef1() {
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ret <4 x float> <float 1.0, float 1.0, float undef, float undef>
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; CHECK: .globl __xmm@00000000000000003f8000003f800000
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; CHECK-NEXT: .section .rdata,"dr",discard,__xmm@00000000000000003f8000003f800000
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; CHECK-NEXT: .p2align 4
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; CHECK-NEXT: __xmm@00000000000000003f8000003f800000:
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; CHECK-NEXT: .long 0x3f800000 # float 1
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; CHECK-NEXT: .long 0x3f800000 # float 1
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; CHECK-NEXT: .zero 4
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; CHECK-NEXT: .zero 4
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; CHECK: undef1:
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; CHECK: movaps __xmm@00000000000000003f8000003f800000(%rip), %xmm0
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; CHECK-NEXT: ret
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}
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define float @pr23966(i32 %a) {
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%tobool = icmp ne i32 %a, 0
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%sel = select i1 %tobool, float -1.000000e+00, float 1.000000e+00
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ret float %sel
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}
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; CHECK: .globl __real@bf8000003f800000
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; CHECK-NEXT: .section .rdata,"dr",discard,__real@bf8000003f800000
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; CHECK-NEXT: .p2align 3
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; CHECK-NEXT: __real@bf8000003f800000:
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; CHECK-NEXT: .long 0x3f800000
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; CHECK-NEXT: .long 0xbf800000
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define <4 x i64> @ymm() {
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entry:
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ret <4 x i64> <i64 8589934593, i64 17179869187, i64 8589934593, i64 17179869187>
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}
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; CHECK: .globl __ymm@0000000400000003000000020000000100000004000000030000000200000001
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; CHECK: .section .rdata,"dr",discard,__ymm@0000000400000003000000020000000100000004000000030000000200000001
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; CHECK: .p2align 5
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; CHECK: __ymm@0000000400000003000000020000000100000004000000030000000200000001:
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; CHECK: .quad 8589934593 # 0x200000001
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; CHECK: .quad 17179869187 # 0x400000003
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; CHECK: .quad 8589934593 # 0x200000001
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; CHECK: .quad 17179869187
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