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10839866a1
This patch implements initial backend support for a -mtune CPU controlled by a "tune-cpu" function attribute. If the attribute is not present X86 will use the resolved CPU from target-cpu attribute or command line. This patch adds MC layer support a tune CPU. Each CPU now has two sets of features stored in their GenSubtargetInfo.inc tables . These features lists are passed separately to the Processor and ProcessorModel classes in tablegen. The tune list defaults to an empty list to avoid changes to non-X86. This annoyingly increases the size of static tables on all target as we now store 24 more bytes per CPU. I haven't quantified the overall impact, but I can if we're concerned. One new test is added to X86 to show a few tuning features with mismatched tune-cpu and target-cpu/target-feature attributes to demonstrate independent control. Another new test is added to demonstrate that the scheduler model follows the tune CPU. I have not added a -mtune to llc/opt or MC layer command line yet. With no attributes we'll just use the -mcpu for both. MC layer tools will always follow the normal CPU for tuning. Differential Revision: https://reviews.llvm.org/D85165
128 lines
4.4 KiB
C++
128 lines
4.4 KiB
C++
//===-- AVRMCTargetDesc.cpp - AVR Target Descriptions ---------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides AVR specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "AVRELFStreamer.h"
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#include "AVRInstPrinter.h"
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#include "AVRMCAsmInfo.h"
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#include "AVRMCELFStreamer.h"
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#include "AVRMCTargetDesc.h"
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#include "AVRTargetStreamer.h"
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#include "TargetInfo/AVRTargetInfo.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCELFStreamer.h"
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#include "llvm/MC/MCCodeEmitter.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/TargetRegistry.h"
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#define GET_INSTRINFO_MC_DESC
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#include "AVRGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "AVRGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "AVRGenRegisterInfo.inc"
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using namespace llvm;
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MCInstrInfo *llvm::createAVRMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitAVRMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createAVRMCRegisterInfo(const Triple &TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitAVRMCRegisterInfo(X, 0);
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return X;
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}
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static MCSubtargetInfo *createAVRMCSubtargetInfo(const Triple &TT,
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StringRef CPU, StringRef FS) {
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return createAVRMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS);
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}
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static MCInstPrinter *createAVRMCInstPrinter(const Triple &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI) {
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if (SyntaxVariant == 0) {
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return new AVRInstPrinter(MAI, MII, MRI);
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}
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return nullptr;
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}
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static MCStreamer *createMCStreamer(const Triple &T, MCContext &Context,
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std::unique_ptr<MCAsmBackend> &&MAB,
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std::unique_ptr<MCObjectWriter> &&OW,
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std::unique_ptr<MCCodeEmitter> &&Emitter,
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bool RelaxAll) {
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return createELFStreamer(Context, std::move(MAB), std::move(OW),
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std::move(Emitter), RelaxAll);
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}
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static MCTargetStreamer *
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createAVRObjectTargetStreamer(MCStreamer &S, const MCSubtargetInfo &STI) {
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return new AVRELFStreamer(S, STI);
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}
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static MCTargetStreamer *createMCAsmTargetStreamer(MCStreamer &S,
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formatted_raw_ostream &OS,
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MCInstPrinter *InstPrint,
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bool isVerboseAsm) {
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return new AVRTargetAsmStreamer(S);
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}
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extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRTargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfo<AVRMCAsmInfo> X(getTheAVRTarget());
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(getTheAVRTarget(), createAVRMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(getTheAVRTarget(), createAVRMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(getTheAVRTarget(),
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createAVRMCSubtargetInfo);
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// Register the MCInstPrinter.
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TargetRegistry::RegisterMCInstPrinter(getTheAVRTarget(),
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createAVRMCInstPrinter);
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// Register the MC Code Emitter
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TargetRegistry::RegisterMCCodeEmitter(getTheAVRTarget(), createAVRMCCodeEmitter);
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// Register the obj streamer
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TargetRegistry::RegisterELFStreamer(getTheAVRTarget(), createMCStreamer);
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// Register the obj target streamer.
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TargetRegistry::RegisterObjectTargetStreamer(getTheAVRTarget(),
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createAVRObjectTargetStreamer);
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// Register the asm target streamer.
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TargetRegistry::RegisterAsmTargetStreamer(getTheAVRTarget(),
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createMCAsmTargetStreamer);
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// Register the asm backend (as little endian).
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TargetRegistry::RegisterMCAsmBackend(getTheAVRTarget(), createAVRAsmBackend);
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}
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