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llvm-mirror/test/CodeGen/AMDGPU/loop_header_nopred.mir
Stanislav Mekhanoshin 8776a8f98e Remove assert from MachineLoop::getLoopPredecessor()
According to the documentation method returns predecessor
if the given loop's header has exactly one unique predecessor
outside the loop. Otherwise return null.

In reality it asserts if there is no predecessor outside of
the loop.

The testcase has the loop where predecessors outside of the
loop were not identified as analyzeBranch() was unable to
process the mask branch and returned true. That is also not
correct to assert for the truly dead loops.

Differential Revision: https://reviews.llvm.org/D67634

llvm-svn: 372405
2019-09-20 15:26:10 +00:00

93 lines
2.3 KiB
YAML

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -march=amdgcn -o - -run-pass=block-placement -mcpu=gfx1010 -mattr=-inst-fwd-prefetch-bug -verify-machineinstrs %s | FileCheck -check-prefix=GCN %s
# Used to fail with
# Assertion `Out && "Header of loop has no predecessors from outside loop?"
---
name: loop_header_nopred
body: |
; GCN-LABEL: name: loop_header_nopred
; GCN: bb.0:
; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; GCN: S_CBRANCH_VCCZ %bb.3, implicit $vcc
; GCN: S_BRANCH %bb.2
; GCN: bb.6 (align 64):
; GCN: successors: %bb.7(0x04000000), %bb.1(0x7c000000)
; GCN: S_CBRANCH_VCCNZ %bb.7, implicit $vcc
; GCN: bb.1:
; GCN: successors: %bb.2(0x40000000), %bb.3(0x40000000)
; GCN: S_CBRANCH_VCCNZ %bb.2, implicit $vcc
; GCN: bb.3:
; GCN: successors: %bb.4(0x40000000), %bb.6(0x40000000)
; GCN: SI_MASK_BRANCH %bb.6, implicit $exec
; GCN: S_BRANCH %bb.4
; GCN: bb.2 (align 64):
; GCN: successors: %bb.4(0x40000000), %bb.6(0x40000000)
; GCN: SI_MASK_BRANCH %bb.6, implicit $exec
; GCN: S_BRANCH %bb.4
; GCN: bb.4:
; GCN: successors: %bb.5(0x04000000), %bb.4(0x7c000000)
; GCN: S_NOP 0
; GCN: S_NOP 0
; GCN: S_NOP 0
; GCN: S_NOP 0
; GCN: S_NOP 0
; GCN: S_NOP 0
; GCN: S_NOP 0
; GCN: S_NOP 0
; GCN: S_NOP 0
; GCN: S_NOP 0
; GCN: S_NOP 0
; GCN: S_CBRANCH_EXECZ %bb.4, implicit $exec
; GCN: bb.5:
; GCN: successors: %bb.6(0x80000000)
; GCN: S_BRANCH %bb.6
; GCN: bb.7:
; GCN: S_ENDPGM 0
bb.0:
successors: %bb.1(0x80000000)
bb.1:
successors: %bb.2(0x40000000), %bb.3(0x40000000)
S_CBRANCH_VCCZ %bb.3, implicit $vcc
S_BRANCH %bb.2
bb.2:
successors: %bb.3(0x80000000)
bb.3:
successors: %bb.4(0x40000000), %bb.6(0x40000000)
SI_MASK_BRANCH %bb.6, implicit $exec
S_BRANCH %bb.4
bb.4:
successors: %bb.5(0x04000000), %bb.4(0x7c000000)
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_NOP 0
S_CBRANCH_EXECZ %bb.4, implicit $exec
bb.5:
successors: %bb.6(0x80000000)
bb.6:
successors: %bb.7(0x04000000), %bb.1(0x7c000000)
S_CBRANCH_VCCZ %bb.1, implicit $vcc
bb.7:
S_ENDPGM 0
...