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llvm-mirror/test/CodeGen/AMDGPU/r600-constant-array-fixup.ll
Jay Foad 1f578036a2 Partially revert D61491 "AMDGPU: Be explicit about whether the high-word in SI_PC_ADD_REL_OFFSET is 0"
Summary:
D61491 caused us to use relocs when they're not strictly necessary, to
refer to symbols in the text section. This is a pessimization and it's a
problem for some loaders that don't support relocs yet.

Reviewers: nhaehnle, arsenm, tpr

Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, t-tye, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D65813

llvm-svn: 370667
2019-09-02 14:40:57 +00:00

29 lines
878 B
LLVM

; RUN: llc -filetype=obj -march=r600 -mcpu=cypress -verify-machineinstrs < %s | llvm-readobj -r --symbols | FileCheck %s
@arr = internal unnamed_addr addrspace(4) constant [4 x i32] [i32 4, i32 5, i32 6, i32 7], align 4
; CHECK: Relocations [
; CHECK: Section (3) .rel.text {
; CHECK: 0x58 R_AMDGPU_ABS32 arr 0x0
; CHECK: }
; CHECK: ]
; CHECK: Symbol {
; CHECK: Name: arr (11)
; CHECK: Value: 0x0
; CHECK: Size: 16
; CHECK: Binding: Local (0x0)
; CHECK: Type: Object (0x1)
; CHECK: Other: 0
; CHECK: Section: .text (0x2)
; CHECK: }
define amdgpu_kernel void @test_constant_array_fixup(i32 addrspace(1)* nocapture %out, i32 %idx) #0 {
entry:
%arrayidx = getelementptr inbounds [4 x i32], [4 x i32] addrspace(4)* @arr, i32 0, i32 %idx
%val = load i32, i32 addrspace(4)* %arrayidx
store i32 %val, i32 addrspace(1)* %out, align 4
ret void
}
attributes #0 = { nounwind }