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8b9ad8cd92
Have BasicTTI call the base implementation so that both agree on the default behaviour, which the default being a cost of '1'. This has required an X86 specific implementation as it seems to be very reliant on those instructions being free. Changes are also made to AMDGPU so that their implementations distinguish between cost kinds, so that the unrolling isn't affected. PowerPC also has its own implementation to prevent changes to the reg-usage vectorizer test. The cost model test changes now reflect that ret instructions are not generally free. Differential Revision: https://reviews.llvm.org/D79164
97 lines
4.8 KiB
LLVM
97 lines
4.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
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; RUN: opt -cost-model -analyze -mtriple=thumbv8.1m.main-none-eabi < %s | FileCheck %s
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define void @shl(i32 %a, i32 %b) {
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; CHECK-LABEL: 'shl'
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %as = shl i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ac = add i32 %b, %as
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ss = shl i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %sc = sub i32 %b, %ss
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %xs = shl i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %xc = xor i32 %b, %xs
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ns = shl i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nc = and i32 %b, %ns
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %os = shl i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %oc = or i32 %b, %os
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %is = shl i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ic = icmp eq i32 %b, %is
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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%as = shl i32 %a, 3
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%ac = add i32 %b, %as
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%ss = shl i32 %a, 3
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%sc = sub i32 %b, %ss
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%xs = shl i32 %a, 3
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%xc = xor i32 %b, %xs
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%ns = shl i32 %a, 3
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%nc = and i32 %b, %ns
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%os = shl i32 %a, 3
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%oc = or i32 %b, %os
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%is = shl i32 %a, 3
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%ic = icmp eq i32 %b, %is
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ret void
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}
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define void @ashr(i32 %a, i32 %b) {
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; CHECK-LABEL: 'ashr'
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %as = ashr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ac = add i32 %b, %as
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ss = ashr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %sc = sub i32 %b, %ss
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %xs = ashr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %xc = xor i32 %b, %xs
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ns = ashr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nc = and i32 %b, %ns
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %os = ashr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %oc = or i32 %b, %os
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %is = ashr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ic = icmp eq i32 %b, %is
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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%as = ashr i32 %a, 3
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%ac = add i32 %b, %as
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%ss = ashr i32 %a, 3
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%sc = sub i32 %b, %ss
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%xs = ashr i32 %a, 3
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%xc = xor i32 %b, %xs
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%ns = ashr i32 %a, 3
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%nc = and i32 %b, %ns
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%os = ashr i32 %a, 3
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%oc = or i32 %b, %os
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%is = ashr i32 %a, 3
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%ic = icmp eq i32 %b, %is
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ret void
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}
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define void @lshr(i32 %a, i32 %b) {
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; CHECK-LABEL: 'lshr'
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %as = lshr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ac = add i32 %b, %as
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ss = lshr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %sc = sub i32 %b, %ss
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %xs = lshr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %xc = xor i32 %b, %xs
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %ns = lshr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %nc = and i32 %b, %ns
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %os = lshr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %oc = or i32 %b, %os
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; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %is = lshr i32 %a, 3
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %ic = icmp eq i32 %b, %is
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; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret void
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;
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%as = lshr i32 %a, 3
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%ac = add i32 %b, %as
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%ss = lshr i32 %a, 3
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%sc = sub i32 %b, %ss
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%xs = lshr i32 %a, 3
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%xc = xor i32 %b, %xs
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%ns = lshr i32 %a, 3
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%nc = and i32 %b, %ns
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%os = lshr i32 %a, 3
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%oc = or i32 %b, %os
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%is = lshr i32 %a, 3
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%ic = icmp eq i32 %b, %is
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ret void
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}
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