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https://github.com/RPCS3/llvm-mirror.git
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5d7ef4b589
The scalarization overhead was set deliberately high for MVE, whilst the codegen was new. It helps protect us against the negative ramifications of mixing scalar and vector instructions. This decreases that, especially for floating point where the cost of extracting/inserting lane elements can be low. For integer the cost is still fairly high due to the cross-register-bank copy, but is no longer n^2 in the length of the vector. In general, this will decrease the cost of scalarizing floats and long integer vectors. i64 increase in cost, having a high cost before and after this patch. For floats this allows up to start doing things like vectorizing fdiv instructions, even if they are scalarized. Differential Revision: https://reviews.llvm.org/D98245
176 lines
14 KiB
LLVM
176 lines
14 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
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; RUN: opt -cost-model -analyze -mtriple=thumbv8m.main < %s | FileCheck %s --check-prefix=V8M
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; RUN: opt -cost-model -analyze -mtriple=armv8a-linux-gnueabihf < %s | FileCheck %s --check-prefix=NEON
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; RUN: opt -cost-model -analyze -mtriple=armv8.1m.main -mattr=+mve < %s | FileCheck %s --check-prefix=MVE
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define i32 @reduce_i64(i32 %arg) {
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; V8M-LABEL: 'reduce_i64'
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; V8M-NEXT: Cost Model: Found an estimated cost of 2 for instruction: %V1 = call i64 @llvm.vector.reduce.smin.v1i64(<1 x i64> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 13 for instruction: %V2 = call i64 @llvm.vector.reduce.smin.v2i64(<2 x i64> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 35 for instruction: %V4 = call i64 @llvm.vector.reduce.smin.v4i64(<4 x i64> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 79 for instruction: %V8 = call i64 @llvm.vector.reduce.smin.v8i64(<8 x i64> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 167 for instruction: %V16 = call i64 @llvm.vector.reduce.smin.v16i64(<16 x i64> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
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;
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; NEON-LABEL: 'reduce_i64'
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; NEON-NEXT: Cost Model: Found an estimated cost of 3 for instruction: %V1 = call i64 @llvm.vector.reduce.smin.v1i64(<1 x i64> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %V2 = call i64 @llvm.vector.reduce.smin.v2i64(<2 x i64> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 31 for instruction: %V4 = call i64 @llvm.vector.reduce.smin.v4i64(<4 x i64> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %V8 = call i64 @llvm.vector.reduce.smin.v8i64(<8 x i64> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 178 for instruction: %V16 = call i64 @llvm.vector.reduce.smin.v16i64(<16 x i64> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; MVE-LABEL: 'reduce_i64'
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; MVE-NEXT: Cost Model: Found an estimated cost of 8 for instruction: %V1 = call i64 @llvm.vector.reduce.smin.v1i64(<1 x i64> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 148 for instruction: %V2 = call i64 @llvm.vector.reduce.smin.v2i64(<2 x i64> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 288 for instruction: %V4 = call i64 @llvm.vector.reduce.smin.v4i64(<4 x i64> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 568 for instruction: %V8 = call i64 @llvm.vector.reduce.smin.v8i64(<8 x i64> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 1128 for instruction: %V16 = call i64 @llvm.vector.reduce.smin.v16i64(<16 x i64> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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%V1 = call i64 @llvm.vector.reduce.smin.v1i64(<1 x i64> undef)
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%V2 = call i64 @llvm.vector.reduce.smin.v2i64(<2 x i64> undef)
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%V4 = call i64 @llvm.vector.reduce.smin.v4i64(<4 x i64> undef)
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%V8 = call i64 @llvm.vector.reduce.smin.v8i64(<8 x i64> undef)
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%V16 = call i64 @llvm.vector.reduce.smin.v16i64(<16 x i64> undef)
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ret i32 undef
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}
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define i32 @reduce_i32(i32 %arg) {
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; V8M-LABEL: 'reduce_i32'
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; V8M-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2 = call i32 @llvm.vector.reduce.smin.v2i32(<2 x i32> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %V4 = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %V8 = call i32 @llvm.vector.reduce.smin.v8i32(<8 x i32> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 91 for instruction: %V16 = call i32 @llvm.vector.reduce.smin.v16i32(<16 x i32> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 187 for instruction: %V32 = call i32 @llvm.vector.reduce.smin.v32i32(<32 x i32> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
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;
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; NEON-LABEL: 'reduce_i32'
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; NEON-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %V2 = call i32 @llvm.vector.reduce.smin.v2i32(<2 x i32> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %V4 = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 81 for instruction: %V8 = call i32 @llvm.vector.reduce.smin.v8i32(<8 x i32> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 133 for instruction: %V16 = call i32 @llvm.vector.reduce.smin.v16i32(<16 x i32> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 237 for instruction: %V32 = call i32 @llvm.vector.reduce.smin.v32i32(<32 x i32> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; MVE-LABEL: 'reduce_i32'
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; MVE-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %V2 = call i32 @llvm.vector.reduce.smin.v2i32(<2 x i32> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 140 for instruction: %V4 = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 208 for instruction: %V8 = call i32 @llvm.vector.reduce.smin.v8i32(<8 x i32> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 376 for instruction: %V16 = call i32 @llvm.vector.reduce.smin.v16i32(<16 x i32> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 712 for instruction: %V32 = call i32 @llvm.vector.reduce.smin.v32i32(<32 x i32> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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%V2 = call i32 @llvm.vector.reduce.smin.v2i32(<2 x i32> undef)
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%V4 = call i32 @llvm.vector.reduce.smin.v4i32(<4 x i32> undef)
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%V8 = call i32 @llvm.vector.reduce.smin.v8i32(<8 x i32> undef)
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%V16 = call i32 @llvm.vector.reduce.smin.v16i32(<16 x i32> undef)
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%V32 = call i32 @llvm.vector.reduce.smin.v32i32(<32 x i32> undef)
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ret i32 undef
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}
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define i32 @reduce_i16(i32 %arg) {
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; V8M-LABEL: 'reduce_i16'
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; V8M-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2 = call i16 @llvm.vector.reduce.smin.v2i16(<2 x i16> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %V4 = call i16 @llvm.vector.reduce.smin.v4i16(<4 x i16> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %V8 = call i16 @llvm.vector.reduce.smin.v8i16(<8 x i16> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 91 for instruction: %V16 = call i16 @llvm.vector.reduce.smin.v16i16(<16 x i16> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 187 for instruction: %V32 = call i16 @llvm.vector.reduce.smin.v32i16(<32 x i16> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 379 for instruction: %V64 = call i16 @llvm.vector.reduce.smin.v64i16(<64 x i16> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
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;
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; NEON-LABEL: 'reduce_i16'
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; NEON-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %V2 = call i16 @llvm.vector.reduce.smin.v2i16(<2 x i16> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %V4 = call i16 @llvm.vector.reduce.smin.v4i16(<4 x i16> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 153 for instruction: %V8 = call i16 @llvm.vector.reduce.smin.v8i16(<8 x i16> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 203 for instruction: %V16 = call i16 @llvm.vector.reduce.smin.v16i16(<16 x i16> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 303 for instruction: %V32 = call i16 @llvm.vector.reduce.smin.v32i16(<32 x i16> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 503 for instruction: %V64 = call i16 @llvm.vector.reduce.smin.v64i16(<64 x i16> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; MVE-LABEL: 'reduce_i16'
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; MVE-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %V2 = call i16 @llvm.vector.reduce.smin.v2i16(<2 x i16> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 140 for instruction: %V4 = call i16 @llvm.vector.reduce.smin.v4i16(<4 x i16> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 400 for instruction: %V8 = call i16 @llvm.vector.reduce.smin.v8i16(<8 x i16> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 532 for instruction: %V16 = call i16 @llvm.vector.reduce.smin.v16i16(<16 x i16> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 860 for instruction: %V32 = call i16 @llvm.vector.reduce.smin.v32i16(<32 x i16> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 1516 for instruction: %V64 = call i16 @llvm.vector.reduce.smin.v64i16(<64 x i16> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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%V2 = call i16 @llvm.vector.reduce.smin.v2i16(<2 x i16> undef)
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%V4 = call i16 @llvm.vector.reduce.smin.v4i16(<4 x i16> undef)
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%V8 = call i16 @llvm.vector.reduce.smin.v8i16(<8 x i16> undef)
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%V16 = call i16 @llvm.vector.reduce.smin.v16i16(<16 x i16> undef)
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%V32 = call i16 @llvm.vector.reduce.smin.v32i16(<32 x i16> undef)
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%V64 = call i16 @llvm.vector.reduce.smin.v64i16(<64 x i16> undef)
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ret i32 undef
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}
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define i32 @reduce_i8(i32 %arg) {
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; V8M-LABEL: 'reduce_i8'
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; V8M-NEXT: Cost Model: Found an estimated cost of 7 for instruction: %V2 = call i8 @llvm.vector.reduce.smin.v2i8(<2 x i8> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 19 for instruction: %V4 = call i8 @llvm.vector.reduce.smin.v4i8(<4 x i8> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 43 for instruction: %V8 = call i8 @llvm.vector.reduce.smin.v8i8(<8 x i8> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 91 for instruction: %V16 = call i8 @llvm.vector.reduce.smin.v16i8(<16 x i8> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 187 for instruction: %V32 = call i8 @llvm.vector.reduce.smin.v32i8(<32 x i8> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 379 for instruction: %V64 = call i8 @llvm.vector.reduce.smin.v64i8(<64 x i8> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 763 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
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; V8M-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
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;
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; NEON-LABEL: 'reduce_i8'
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; NEON-NEXT: Cost Model: Found an estimated cost of 17 for instruction: %V2 = call i8 @llvm.vector.reduce.smin.v2i8(<2 x i8> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 55 for instruction: %V4 = call i8 @llvm.vector.reduce.smin.v4i8(<4 x i8> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 153 for instruction: %V8 = call i8 @llvm.vector.reduce.smin.v8i8(<8 x i8> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 395 for instruction: %V16 = call i8 @llvm.vector.reduce.smin.v16i8(<16 x i8> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 493 for instruction: %V32 = call i8 @llvm.vector.reduce.smin.v32i8(<32 x i8> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 689 for instruction: %V64 = call i8 @llvm.vector.reduce.smin.v64i8(<64 x i8> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 1081 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
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; NEON-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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; MVE-LABEL: 'reduce_i8'
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; MVE-NEXT: Cost Model: Found an estimated cost of 76 for instruction: %V2 = call i8 @llvm.vector.reduce.smin.v2i8(<2 x i8> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 140 for instruction: %V4 = call i8 @llvm.vector.reduce.smin.v4i8(<4 x i8> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 400 for instruction: %V8 = call i8 @llvm.vector.reduce.smin.v8i8(<8 x i8> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 1044 for instruction: %V16 = call i8 @llvm.vector.reduce.smin.v16i8(<16 x i8> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 1304 for instruction: %V32 = call i8 @llvm.vector.reduce.smin.v32i8(<32 x i8> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 1952 for instruction: %V64 = call i8 @llvm.vector.reduce.smin.v64i8(<64 x i8> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 3248 for instruction: %V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
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; MVE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: ret i32 undef
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;
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%V2 = call i8 @llvm.vector.reduce.smin.v2i8(<2 x i8> undef)
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%V4 = call i8 @llvm.vector.reduce.smin.v4i8(<4 x i8> undef)
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%V8 = call i8 @llvm.vector.reduce.smin.v8i8(<8 x i8> undef)
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%V16 = call i8 @llvm.vector.reduce.smin.v16i8(<16 x i8> undef)
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%V32 = call i8 @llvm.vector.reduce.smin.v32i8(<32 x i8> undef)
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%V64 = call i8 @llvm.vector.reduce.smin.v64i8(<64 x i8> undef)
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%V128 = call i8 @llvm.vector.reduce.smin.v128i8(<128 x i8> undef)
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ret i32 undef
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}
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declare i64 @llvm.vector.reduce.smin.v1i64(<1 x i64>)
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declare i64 @llvm.vector.reduce.smin.v2i64(<2 x i64>)
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declare i64 @llvm.vector.reduce.smin.v4i64(<4 x i64>)
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declare i64 @llvm.vector.reduce.smin.v8i64(<8 x i64>)
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declare i64 @llvm.vector.reduce.smin.v16i64(<16 x i64>)
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declare i32 @llvm.vector.reduce.smin.v2i32(<2 x i32>)
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declare i32 @llvm.vector.reduce.smin.v4i32(<4 x i32>)
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declare i32 @llvm.vector.reduce.smin.v8i32(<8 x i32>)
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declare i32 @llvm.vector.reduce.smin.v16i32(<16 x i32>)
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declare i32 @llvm.vector.reduce.smin.v32i32(<32 x i32>)
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declare i16 @llvm.vector.reduce.smin.v2i16(<2 x i16>)
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declare i16 @llvm.vector.reduce.smin.v4i16(<4 x i16>)
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declare i16 @llvm.vector.reduce.smin.v8i16(<8 x i16>)
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declare i16 @llvm.vector.reduce.smin.v16i16(<16 x i16>)
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declare i16 @llvm.vector.reduce.smin.v32i16(<32 x i16>)
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declare i16 @llvm.vector.reduce.smin.v64i16(<64 x i16>)
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declare i8 @llvm.vector.reduce.smin.v2i8(<2 x i8>)
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declare i8 @llvm.vector.reduce.smin.v4i8(<4 x i8>)
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declare i8 @llvm.vector.reduce.smin.v8i8(<8 x i8>)
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declare i8 @llvm.vector.reduce.smin.v16i8(<16 x i8>)
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declare i8 @llvm.vector.reduce.smin.v32i8(<32 x i8>)
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declare i8 @llvm.vector.reduce.smin.v64i8(<64 x i8>)
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declare i8 @llvm.vector.reduce.smin.v128i8(<128 x i8>)
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