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llvm-mirror/test/CodeGen/AMDGPU/extload-align.ll
Matt Arsenault cc12b285b6 CodeGen: Print/parse LLTs in MachineMemOperands
This will currently accept the old number of bytes syntax, and convert
it to a scalar. This should be removed in the near future (I think I
converted all of the tests already, but likely missed a few).

Not sure what the exact syntax and policy should be. We can continue
printing the number of bytes for non-generic instructions to avoid
test churn and only allow non-scalar types for generic instructions.

This will currently print the LLT in parentheses, but accept parsing
the existing integers and implicitly converting to scalar. The
parentheses are a bit ugly, but the parser logic seems unable to deal
without either parentheses or some keyword to indicate the start of a
type.
2021-06-30 16:54:13 -04:00

25 lines
1.1 KiB
LLVM

; RUN: llc -debug-only=machine-scheduler -march=amdgcn -mtriple=amdgcn-- -verify-machineinstrs %s -o - 2>&1| FileCheck -check-prefix=DEBUG %s
target datalayout = "A5"
; REQUIRES: asserts
; Verify that the extload generated from %eval has the default
; alignment size (2) corresponding to the underlying memory size (i16)
; size and not 4 corresponding to the sign-extended size (i32).
; DEBUG: {{^}}# Machine code for function extload_align:
; DEBUG: (volatile load (s16) from %ir.a, addrspace 5)
; DEBUG: {{^}}# End machine code for function extload_align.
define amdgpu_kernel void @extload_align(i32 addrspace(5)* %out, i32 %index) #0 {
%v0 = alloca [4 x i16], addrspace(5)
%a1 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(5)* %v0, i32 0, i32 0
%a2 = getelementptr inbounds [4 x i16], [4 x i16] addrspace(5)* %v0, i32 0, i32 1
store volatile i16 0, i16 addrspace(5)* %a1
store volatile i16 1, i16 addrspace(5)* %a2
%a = getelementptr inbounds [4 x i16], [4 x i16] addrspace(5)* %v0, i32 0, i32 %index
%val = load volatile i16, i16 addrspace(5)* %a
%eval = sext i16 %val to i32
store i32 %eval, i32 addrspace(5)* %out
ret void
}