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llvm-mirror/test/CodeGen/AMDGPU/merge-load-store-agpr.mir
Matt Arsenault cc12b285b6 CodeGen: Print/parse LLTs in MachineMemOperands
This will currently accept the old number of bytes syntax, and convert
it to a scalar. This should be removed in the near future (I think I
converted all of the tests already, but likely missed a few).

Not sure what the exact syntax and policy should be. We can continue
printing the number of bytes for non-generic instructions to avoid
test churn and only allow non-scalar types for generic instructions.

This will currently print the LLT in parentheses, but accept parsing
the existing integers and implicitly converting to scalar. The
parentheses are a bit ugly, but the parser logic seems unable to deal
without either parentheses or some keyword to indicate the start of a
type.
2021-06-30 16:54:13 -04:00

95 lines
3.3 KiB
YAML

# RUN: llc -march=amdgcn -mcpu=gfx90a -verify-machineinstrs -run-pass si-load-store-opt -o - %s | FileCheck -enable-var-scope -check-prefix=GCN %s
# GCN-LABEL: name: ds_read_b32_v_v
# GCN: vreg_64_align2 = DS_READ2_B32
name: ds_read_b32_v_v
body: |
bb.0:
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = DS_READ_B32_gfx9 %0, 0, 0, implicit $exec :: (load (s32) from `i32 addrspace(3)* undef`)
%2:vgpr_32 = DS_READ_B32_gfx9 %0, 8, 0, implicit $exec :: (load (s32) from `i32 addrspace(3)* undef`)
...
# GCN-LABEL: name: ds_read_b32_a_a
# GCN: areg_64_align2 = DS_READ2_B32
name: ds_read_b32_a_a
body: |
bb.0:
%0:vgpr_32 = IMPLICIT_DEF
%1:agpr_32 = DS_READ_B32_gfx9 %0, 0, 0, implicit $exec :: (load (s32) from `i32 addrspace(3)* undef`)
%2:agpr_32 = DS_READ_B32_gfx9 %0, 8, 0, implicit $exec :: (load (s32) from `i32 addrspace(3)* undef`)
...
# GCN-LABEL: name: ds_read_b32_v_a
# GCN: vgpr_32 = DS_READ_B32
# GCN: agpr_32 = DS_READ_B32
name: ds_read_b32_v_a
body: |
bb.0:
%0:vgpr_32 = IMPLICIT_DEF
%1:vgpr_32 = DS_READ_B32_gfx9 %0, 0, 0, implicit $exec :: (load (s32) from `i32 addrspace(3)* undef`)
%2:agpr_32 = DS_READ_B32_gfx9 %0, 8, 0, implicit $exec :: (load (s32) from `i32 addrspace(3)* undef`)
...
# GCN-LABEL: name: ds_read_b32_a_v
# GCN: agpr_32 = DS_READ_B32
# GCN: vgpr_32 = DS_READ_B32
name: ds_read_b32_a_v
body: |
bb.0:
%0:vgpr_32 = IMPLICIT_DEF
%1:agpr_32 = DS_READ_B32_gfx9 %0, 8, 0, implicit $exec :: (load (s32) from `i32 addrspace(3)* undef`)
%2:vgpr_32 = DS_READ_B32_gfx9 %0, 0, 0, implicit $exec :: (load (s32) from `i32 addrspace(3)* undef`)
...
# GCN-LABEL: name: ds_write_b32_v_v
# GCN: DS_WRITE2_B32_gfx9 %0, undef %1:vgpr_32, undef %2:vgpr_32
name: ds_write_b32_v_v
body: |
bb.0:
%0:vgpr_32 = IMPLICIT_DEF
DS_WRITE_B32_gfx9 %0, undef %1:vgpr_32, 0, 0, implicit $exec :: (store (s32) into `i32 addrspace(3)* undef`)
DS_WRITE_B32_gfx9 %0, undef %2:vgpr_32, 8, 0, implicit $exec :: (store (s32) into `i32 addrspace(3)* undef`)
...
# GCN-LABEL: name: ds_write_b32_a_a
# GCN: DS_WRITE_B32_gfx9 %0, undef %1:agpr_32
# GCN: DS_WRITE_B32_gfx9 %0, undef %2:agpr_32
name: ds_write_b32_a_a
body: |
bb.0:
%0:vgpr_32 = IMPLICIT_DEF
DS_WRITE_B32_gfx9 %0, undef %1:agpr_32, 0, 0, implicit $exec :: (store (s32) into `i32 addrspace(3)* undef`)
DS_WRITE_B32_gfx9 %0, undef %2:agpr_32, 8, 0, implicit $exec :: (store (s32) into `i32 addrspace(3)* undef`)
...
# GCN-LABEL: name: ds_write_b32_v_a
# GCN: DS_WRITE_B32_gfx9 %0, undef %1:vgpr_32
# GCN: DS_WRITE_B32_gfx9 %0, undef %2:agpr_32
name: ds_write_b32_v_a
body: |
bb.0:
%0:vgpr_32 = IMPLICIT_DEF
DS_WRITE_B32_gfx9 %0, undef %1:vgpr_32, 0, 0, implicit $exec :: (store (s32) into `i32 addrspace(3)* undef`)
DS_WRITE_B32_gfx9 %0, undef %2:agpr_32, 8, 0, implicit $exec :: (store (s32) into `i32 addrspace(3)* undef`)
...
# GCN-LABEL: name: ds_write_b32_a_v
# GCN: DS_WRITE_B32_gfx9 %0, undef %1:agpr_32
# GCN: DS_WRITE_B32_gfx9 %0, undef %2:vgpr_32
name: ds_write_b32_a_v
body: |
bb.0:
%0:vgpr_32 = IMPLICIT_DEF
DS_WRITE_B32_gfx9 %0, undef %1:agpr_32, 0, 0, implicit $exec :: (store (s32) into `i32 addrspace(3)* undef`)
DS_WRITE_B32_gfx9 %0, undef %2:vgpr_32, 8, 0, implicit $exec :: (store (s32) into `i32 addrspace(3)* undef`)
...