1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 10:42:39 +01:00
llvm-mirror/test/CodeGen/PowerPC/livevars-crash1.mir
Matt Arsenault cc12b285b6 CodeGen: Print/parse LLTs in MachineMemOperands
This will currently accept the old number of bytes syntax, and convert
it to a scalar. This should be removed in the near future (I think I
converted all of the tests already, but likely missed a few).

Not sure what the exact syntax and policy should be. We can continue
printing the number of bytes for non-generic instructions to avoid
test churn and only allow non-scalar types for generic instructions.

This will currently print the LLT in parentheses, but accept parsing
the existing integers and implicitly converting to scalar. The
parentheses are a bit ugly, but the parser logic seems unable to deal
without either parentheses or some keyword to indicate the start of a
type.
2021-06-30 16:54:13 -04:00

128 lines
4.1 KiB
YAML

# RUN: llc -mtriple powerpc64le-unknown-linux-gnu %s -o - 2>&1 \
# RUN: -run-pass=livevars,phi-node-elimination -verify-machineinstrs | \
# RUN: FileCheck %s
--- |
; Function Attrs: noreturn nounwind
define signext i32 @zext_free(i8** nocapture dereferenceable(8) %p) {
entry:
%.pre = load i8*, i8** %p, align 8
br label %loop
loop: ; preds = %loop, %if.then3, %entry
%0 = phi i8* [ %.pre, %entry ], [ %incdec.ptr4, %if.then3 ], [ %incdec.ptr, %loop ]
%1 = load i8, i8* %0, align 1
%tobool = icmp eq i8 %1, 0
%incdec.ptr = getelementptr inbounds i8, i8* %0, i64 1
store i8* %incdec.ptr, i8** %p, align 8
%2 = load i8, i8* %incdec.ptr, align 1
%tobool2 = icmp ne i8 %2, 0
%or.cond = and i1 %tobool, %tobool2
br i1 %or.cond, label %if.then3, label %loop
if.then3: ; preds = %loop
%incdec.ptr4 = getelementptr inbounds i8, i8* %0, i64 2
store i8* %incdec.ptr4, i8** %p, align 8
br label %loop
}
...
---
name: zext_free
tracksRegLiveness: true
registers:
- { id: 0, class: g8rc, preferred-register: '' }
- { id: 1, class: g8rc_and_g8rc_nox0, preferred-register: '' }
- { id: 2, class: g8rc, preferred-register: '' }
- { id: 3, class: g8rc, preferred-register: '' }
- { id: 4, class: g8rc_and_g8rc_nox0, preferred-register: '' }
- { id: 5, class: gprc, preferred-register: '' }
- { id: 6, class: crrc, preferred-register: '' }
- { id: 7, class: crbitrc, preferred-register: '' }
- { id: 8, class: gprc, preferred-register: '' }
- { id: 9, class: crrc, preferred-register: '' }
- { id: 10, class: crbitrc, preferred-register: '' }
- { id: 11, class: crbitrc, preferred-register: '' }
liveins:
- { reg: '$x3', virtual-reg: '%4' }
body: |
bb.0.entry:
successors: %bb.1(0x80000000)
liveins: $x3
%4:g8rc_and_g8rc_nox0 = COPY killed $x3
%0:g8rc = LD 0, %4 :: (dereferenceable load (s64) from %ir.p)
bb.1.loop:
successors: %bb.1(0x20000000), %bb.2(0x60000000)
%1:g8rc_and_g8rc_nox0 = PHI %0, %bb.0, %2, %bb.1, %3, %bb.3, %2, %bb.2
%5:gprc = LBZ 0, %1 :: (load (s8) from %ir.0)
%6:crrc = CMPWI killed %5, 0
%7:crbitrc = COPY killed %6.sub_eq
%2:g8rc = nuw ADDI8 %1, 1
STD %2, 0, %4 :: (store (s64) into %ir.p)
%8:gprc = LBZ 1, %1 :: (load (s8) from %ir.incdec.ptr)
BCn killed %7, %bb.1
B %bb.2
bb.2.loop:
successors: %bb.3(0x55555555), %bb.1(0x2aaaaaab)
%9:crrc = CMPWI killed %8, 0
%10:crbitrc = COPY killed %9.sub_eq
BC killed %10, %bb.1
B %bb.3
bb.3.if.then3:
successors: %bb.1(0x80000000)
%3:g8rc = nuw ADDI8 killed %1, 2
STD %3, 0, %4 :: (store (s64) into %ir.p)
B %bb.1
; CHECK-LABEL: name: zext_free
; CHECK: bb.0.entry:
; CHECK: successors: %bb.1(0x80000000)
; CHECK: liveins: $x3
; CHECK: %4:g8rc_and_g8rc_nox0 = COPY killed $x3
; CHECK: %0:g8rc = LD 0, %4 :: (dereferenceable load (s64) from %ir.p)
; CHECK: %12:g8rc_and_g8rc_nox0 = COPY killed %0
; CHECK: bb.1.loop:
; CHECK: successors: %bb.1(0x20000000), %bb.2(0x60000000)
; CHECK: %1:g8rc_and_g8rc_nox0 = COPY killed %12
; CHECK: %5:gprc = LBZ 0, %1 :: (load (s8) from %ir.0)
; CHECK: %6:crrc = CMPWI killed %5, 0
; CHEXK: %7:crbitrc = COPY killed %6.sub_eq
; CHECK: %2:g8rc = nuw ADDI8 %1, 1
; CHECK: STD %2, 0, %4 :: (store (s64) into %ir.p)
; CHECK: %8:gprc = LBZ 1, %1 :: (load (s8) from %ir.incdec.ptr)
; CHECK: %12:g8rc_and_g8rc_nox0 = COPY %2
; CHECK: BCn killed %7, %bb.1
; CHECK: B %bb.2
; CHECK: bb.2.loop:
; CHECK: successors: %bb.3(0x55555555), %bb.1(0x2aaaaaab)
; CHECK: %9:crrc = CMPWI killed %8, 0
; CHECK: %10:crbitrc = COPY killed %9.sub_eq
; CHECK: %12:g8rc_and_g8rc_nox0 = COPY killed %2
; CHECK: BC killed %10, %bb.1
; CHECK: B %bb.3
; CHECK: bb.3.if.then3:
; CHECK: successors: %bb.1(0x80000000)
; CHECK: %3:g8rc = nuw ADDI8 killed %1, 2
; CHECK: STD %3, 0, %4 :: (store (s64) into %ir.p)
; CHECK: %12:g8rc_and_g8rc_nox0 = COPY killed %3
; CHECK: B %bb.1
...