1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-22 10:42:39 +01:00
llvm-mirror/test/CodeGen/PowerPC/pcrel-tls_get_addr_clobbers.ll
Victor Huang 8636dcc8dc [PowerPC][PCRelative] Add new pseudo instructions for PCRel TLS to fix R2 clobber issue
New pseudo instructions GETtlsADDRPCREL and GETtlsldADDRPCREL are added for properly
setting REGMASK for tls_get_addr function when using PCRelative address.

Differential Revisien: https://reviews.llvm.org/D91420
Reviewed by: bsaleil
2020-11-24 11:34:32 -06:00

26 lines
877 B
LLVM

; RUN: llc -verify-machineinstrs -mtriple="powerpc64le-unknown-linux-gnu" \
; RUN: -ppc-asm-full-reg-names -mcpu=pwr10 -relocation-model=pic < %s | FileCheck %s
%0 = type { i32 (...)**, %0* }
@x = external dso_local thread_local unnamed_addr global %0*, align 8
define void @test(i8* %arg) {
; CHECK-LABEL: test:
; CHECK: # %bb.0: # %entry
; CHECK-NEXT: mflr r0
; CHECK: std r30, -16(r1)
; CHECK-NEXT: std r0, 16(r1)
; CHECK-NEXT: stdu r1, -48(r1)
; CHECK-NEXT: mr r30, r3
; CHECK-NEXT: paddi r3, 0, x@got@tlsld@pcrel, 1
; CHECK-NEXT: bl __tls_get_addr@notoc(x@tlsld)
; CHECK-NEXT: paddi r3, r3, x@DTPREL, 0
; CHECK-NEXT: std r30, 0(r3)
; CHECK-NEXT: addi r1, r1, 48
; CHECK-NEXT: ld r0, 16(r1)
; CHECK-NEXT: ld r30, -16(r1)
; CHECK-NEXT: mtlr r0
entry:
store i8* %arg, i8** bitcast (%0** @x to i8**), align 8
ret void
}