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llvm-mirror/test/CodeGen/PowerPC/ppc32-i64-to-float-conv.ll
Zarko Todorovski d5cb6187da [PPC][AIX] Add vector callee saved registers for AIX extended vector ABI
This patch is the initial patch for support of the AIX extended vector ABI.  The extended ABI treats vector registers V20-V31 as non-volatile and we add them as callee saved registers in this patch.

Reviewed By: sfertile

Differential Revision: https://reviews.llvm.org/D88676
2020-11-24 23:01:51 -05:00

25 lines
806 B
LLVM

; RUN: llc -verify-machineinstrs < %s -mcpu=pwr4 -mattr=-altivec \
; RUN: -mtriple=powerpc-ibm-aix-xcoff 2>&1 | FileCheck %s
; RUN: llc -verify-machineinstrs < %s -mcpu=pwr4 -mattr=-altivec \
; RUN: -mtriple=powerpc-unknown-linux-gnu 2>&1 | FileCheck %s
; When we convert an `i64` to `f32` on 32-bit PPC target, a `setcc` will be
; generated. And this testcase verifies that the operand expansion of `setcc`
; will not crash.
%struct.A = type { float }
@ll = external local_unnamed_addr global i64
@a = external local_unnamed_addr global %struct.A
define void @foo() local_unnamed_addr {
entry:
%0 = load i64, i64* @ll
%conv = sitofp i64 %0 to float
store float %conv, float* getelementptr inbounds (%struct.A, %struct.A* @a, i32 0, i32 0)
ret void
}
; CHECK-NOT: Unexpected setcc expansion!