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https://github.com/RPCS3/llvm-mirror.git
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3633380341
Summary: In SelectionDAG, when a store is immediately chained to another store to the same address, elide the first store as it has no observable effects. This is causes small improvements dealing with intrinsics lowered to stores. Test notes: * Many testcases overwrite store addresses multiple times and needed minor changes, mainly making stores volatile to prevent the optimization from optimizing the test away. * Many X86 test cases optimized out instructions associated with associated with va_start. * Note that test_splat in CodeGen/AArch64/misched-stp.ll no longer has dependencies to check and can probably be removed and potentially replaced with another test. Reviewers: rnk, john.brawn Subscribers: aemerson, rengolin, qcolombet, jyknight, nemanjai, nhaehnle, javed.absar, llvm-commits Differential Revision: https://reviews.llvm.org/D33206 llvm-svn: 303198
180 lines
4.5 KiB
LLVM
180 lines
4.5 KiB
LLVM
; RUN: llc -verify-machineinstrs -mtriple=powerpc-unknown-linux-gnu -O0 < %s | FileCheck %s
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@ld = common global ppc_fp128 0xM00000000000000000000000000000000, align 16
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@ld2 = common global ppc_fp128 0xM00000000000000000000000000000000, align 16
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@d = common global double 0.000000e+00, align 8
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@f = common global float 0.000000e+00, align 4
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@i = common global i32 0, align 4
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@ui = common global i32 0, align 4
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@var = common global i8 0, align 1
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define void @foo() #0 {
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entry:
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%c = alloca ppc_fp128, align 16
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%0 = load ppc_fp128, ppc_fp128* @ld, align 16
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%1 = load ppc_fp128, ppc_fp128* @ld2, align 16
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%add = fadd ppc_fp128 %0, %1
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store volatile ppc_fp128 %add, ppc_fp128* %c, align 16
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%2 = load ppc_fp128, ppc_fp128* @ld, align 16
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%3 = load ppc_fp128, ppc_fp128* @ld2, align 16
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%sub = fsub ppc_fp128 %2, %3
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store volatile ppc_fp128 %sub, ppc_fp128* %c, align 16
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%4 = load ppc_fp128, ppc_fp128* @ld, align 16
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%5 = load ppc_fp128, ppc_fp128* @ld2, align 16
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%mul = fmul ppc_fp128 %4, %5
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store volatile ppc_fp128 %mul, ppc_fp128* %c, align 16
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%6 = load ppc_fp128, ppc_fp128* @ld, align 16
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%7 = load ppc_fp128, ppc_fp128* @ld2, align 16
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%div = fdiv ppc_fp128 %6, %7
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store volatile ppc_fp128 %div, ppc_fp128* %c, align 16
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ret void
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; CHECK-LABEL: __gcc_qadd
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; CHECK-LABEL: __gcc_qsub
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; CHECK-LABEL: __gcc_qmul
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; CHECK-LABEL: __gcc_qdiv
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}
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define void @foo1() #0 {
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entry:
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%0 = load double, double* @d, align 8
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%conv = fpext double %0 to ppc_fp128
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store ppc_fp128 %conv, ppc_fp128* @ld, align 16
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ret void
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; CHECK-LABEL: __gcc_dtoq
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}
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define void @foo2() #0 {
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entry:
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%0 = load ppc_fp128, ppc_fp128* @ld, align 16
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%conv = fptrunc ppc_fp128 %0 to double
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store double %conv, double* @d, align 8
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ret void
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; CHECK-LABEL: __gcc_qtod
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}
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define void @foo3() #0 {
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entry:
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%0 = load ppc_fp128, ppc_fp128* @ld, align 16
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%conv = fptrunc ppc_fp128 %0 to float
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store float %conv, float* @f, align 4
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ret void
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; CHECK-LABEL: __gcc_qtos
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}
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define void @foo4() #0 {
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entry:
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%0 = load i32, i32* @i, align 4
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%conv = sitofp i32 %0 to ppc_fp128
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store ppc_fp128 %conv, ppc_fp128* @ld, align 16
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ret void
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; CHECK-LABEL: __gcc_itoq
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}
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define void @foo5() #0 {
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entry:
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%0 = load i32, i32* @ui, align 4
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%conv = uitofp i32 %0 to ppc_fp128
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store ppc_fp128 %conv, ppc_fp128* @ld, align 16
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ret void
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; CHECK-LABEL: __gcc_utoq
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}
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define void @foo6() #0 {
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entry:
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%0 = load ppc_fp128, ppc_fp128* @ld, align 16
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%1 = load ppc_fp128, ppc_fp128* @ld2, align 16
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%cmp = fcmp oeq ppc_fp128 %0, %1
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%conv = zext i1 %cmp to i32
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%conv1 = trunc i32 %conv to i8
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store i8 %conv1, i8* @var, align 1
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ret void
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; CHECK-LABEL: __gcc_qeq
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}
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define void @foo7() #0 {
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entry:
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%0 = load ppc_fp128, ppc_fp128* @ld, align 16
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%1 = load ppc_fp128, ppc_fp128* @ld2, align 16
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%cmp = fcmp une ppc_fp128 %0, %1
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%conv = zext i1 %cmp to i32
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%conv1 = trunc i32 %conv to i8
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store i8 %conv1, i8* @var, align 1
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ret void
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; CHECK-LABEL: __gcc_qne
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}
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define void @foo8() #0 {
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entry:
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%0 = load ppc_fp128, ppc_fp128* @ld, align 16
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%1 = load ppc_fp128, ppc_fp128* @ld2, align 16
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%cmp = fcmp ogt ppc_fp128 %0, %1
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%conv = zext i1 %cmp to i32
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%conv1 = trunc i32 %conv to i8
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store i8 %conv1, i8* @var, align 1
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ret void
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; CHECK-LABEL: __gcc_qgt
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}
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define void @foo9() #0 {
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entry:
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%0 = load ppc_fp128, ppc_fp128* @ld, align 16
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%1 = load ppc_fp128, ppc_fp128* @ld2, align 16
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%cmp = fcmp olt ppc_fp128 %0, %1
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%conv = zext i1 %cmp to i32
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%conv1 = trunc i32 %conv to i8
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store i8 %conv1, i8* @var, align 1
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ret void
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; CHECK-LABEL: __gcc_qlt
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}
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define void @foo10() #0 {
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entry:
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%0 = load ppc_fp128, ppc_fp128* @ld, align 16
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%1 = load ppc_fp128, ppc_fp128* @ld2, align 16
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%cmp = fcmp ole ppc_fp128 %0, %1
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%conv = zext i1 %cmp to i32
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%conv1 = trunc i32 %conv to i8
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store i8 %conv1, i8* @var, align 1
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ret void
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; CHECK-LABEL: __gcc_qle
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}
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define void @foo11() #0 {
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entry:
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%0 = load ppc_fp128, ppc_fp128* @ld, align 16
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%1 = load ppc_fp128, ppc_fp128* @ld, align 16
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%cmp = fcmp une ppc_fp128 %0, %1
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%conv = zext i1 %cmp to i32
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%conv1 = trunc i32 %conv to i8
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store i8 %conv1, i8* @var, align 1
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ret void
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; CHECK-LABEL: __gcc_qunord
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}
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define void @foo12() #0 {
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entry:
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%0 = load ppc_fp128, ppc_fp128* @ld, align 16
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%1 = load ppc_fp128, ppc_fp128* @ld2, align 16
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%cmp = fcmp oge ppc_fp128 %0, %1
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%conv = zext i1 %cmp to i32
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%conv1 = trunc i32 %conv to i8
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store i8 %conv1, i8* @var, align 1
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ret void
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; CHECK-LABEL: __gcc_qge
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}
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attributes #0 = { "use-soft-float"="true" }
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