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llvm-mirror/test/CodeGen/PowerPC/vec_minmax.ll
Ehsan Amiri db43217a24 Adding -verify-machineinstrs option to PowerPC tests
Currently we have a number of tests that fail with -verify-machineinstrs.
To detect this cases earlier we add the option to the testcases with the
exception of tests that will currently fail with this option. PR 27456 keeps
track of this failures.

No code review, as discussed with Hal Finkel.

llvm-svn: 277624
2016-08-03 18:17:35 +00:00

35 lines
1.4 KiB
LLVM

; Test the vector min/max doubleword instructions added for P8
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 < %s | FileCheck %s
; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu -mcpu=pwr8 -mattr=-vsx < %s | FileCheck %s
declare <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64>, <2 x i64>) nounwind readnone
declare <2 x i64> @llvm.ppc.altivec.vmaxud(<2 x i64>, <2 x i64>) nounwind readnone
declare <2 x i64> @llvm.ppc.altivec.vminsd(<2 x i64>, <2 x i64>) nounwind readnone
declare <2 x i64> @llvm.ppc.altivec.vminud(<2 x i64>, <2 x i64>) nounwind readnone
define <2 x i64> @test_vmaxsd(<2 x i64> %x, <2 x i64> %y) {
%tmp = tail call <2 x i64> @llvm.ppc.altivec.vmaxsd(<2 x i64> %x, <2 x i64> %y)
ret <2 x i64> %tmp
; CHECK: vmaxsd 2, 2, 3
}
define <2 x i64> @test_vmaxud(<2 x i64> %x, <2 x i64> %y) {
%tmp = tail call <2 x i64> @llvm.ppc.altivec.vmaxud(<2 x i64> %x, <2 x i64> %y)
ret <2 x i64> %tmp
; CHECK: vmaxud 2, 2, 3
}
define <2 x i64> @test_vminsd(<2 x i64> %x, <2 x i64> %y) {
%tmp = tail call <2 x i64> @llvm.ppc.altivec.vminsd(<2 x i64> %x, <2 x i64> %y)
ret <2 x i64> %tmp
; CHECK: vminsd 2, 2, 3
}
define <2 x i64> @test_vminud(<2 x i64> %x, <2 x i64> %y) {
%tmp = tail call <2 x i64> @llvm.ppc.altivec.vminud(<2 x i64> %x, <2 x i64> %y)
ret <2 x i64> %tmp
; CHECK: vminud 2, 2, 3
}