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0b832ca92a
As part of the effort to improve AIX support, regression test coverage misses quite a lot for AIX subtarget. This patch adds AIX triple to those don't need extra change, and we can cover more cases in following commits. Reviewed By: steven.zhang Differential Revision: https://reviews.llvm.org/D94159
27 lines
1017 B
LLVM
27 lines
1017 B
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
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; RUN: llc -verify-machineinstrs -mcpu=pwr8 -mtriple=powerpc64-ibm-aix-xcoff -vec-extabi < %s | FileCheck %s
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define <8 x i16> @mul(<8 x i16> %m, <8 x i16> %n) {
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; CHECK-LABEL: mul:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vxor 4, 4, 4
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; CHECK-NEXT: vmladduhm 2, 2, 3, 4
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; CHECK-NEXT: blr
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entry:
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%0 = mul <8 x i16> %m, %n
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ret <8 x i16> %0
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}
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define <8 x i16> @madd(<8 x i16> %m, <8 x i16> %n, <8 x i16> %o) {
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; CHECK-LABEL: madd:
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; CHECK: # %bb.0: # %entry
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; CHECK-NEXT: vmladduhm 2, 2, 3, 4
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; CHECK-NEXT: blr
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entry:
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%0 = mul <8 x i16> %m, %n
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%1 = add <8 x i16> %0, %o
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ret <8 x i16> %1
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}
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