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llvm-mirror/test/CodeGen/X86/GlobalISel/select-constant.mir
Matt Arsenault cc12b285b6 CodeGen: Print/parse LLTs in MachineMemOperands
This will currently accept the old number of bytes syntax, and convert
it to a scalar. This should be removed in the near future (I think I
converted all of the tests already, but likely missed a few).

Not sure what the exact syntax and policy should be. We can continue
printing the number of bytes for non-generic instructions to avoid
test churn and only allow non-scalar types for generic instructions.

This will currently print the LLT in parentheses, but accept parsing
the existing integers and implicitly converting to scalar. The
parentheses are a bit ugly, but the parser logic seems unable to deal
without either parentheses or some keyword to indicate the start of a
type.
2021-06-30 16:54:13 -04:00

188 lines
4.2 KiB
YAML

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=x86_64-linux-gnu -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefix=CHECK
--- |
define i8 @const_i8() {
ret i8 2
}
define i16 @const_i16() {
ret i16 3
}
define i32 @const_i32() {
ret i32 4
}
define i32 @const_i32_0() {
ret i32 0
}
define i64 @const_i64() {
ret i64 68719476720
}
define i64 @const_i64_u32() {
ret i64 1879048192
}
define i64 @const_i64_i32() {
ret i64 -1
}
define void @main(i32** %data) {
store i32* null, i32** %data, align 8
ret void
}
...
---
name: const_i8
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: gpr }
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: const_i8
; CHECK: [[MOV8ri:%[0-9]+]]:gr8 = MOV8ri 2
; CHECK: $al = COPY [[MOV8ri]]
; CHECK: RET 0, implicit $al
%0(s8) = G_CONSTANT i8 2
$al = COPY %0(s8)
RET 0, implicit $al
...
---
name: const_i16
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: gpr }
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: const_i16
; CHECK: [[MOV16ri:%[0-9]+]]:gr16 = MOV16ri 3
; CHECK: $ax = COPY [[MOV16ri]]
; CHECK: RET 0, implicit $ax
%0(s16) = G_CONSTANT i16 3
$ax = COPY %0(s16)
RET 0, implicit $ax
...
---
name: const_i32
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: gpr }
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: const_i32
; CHECK: [[MOV32ri:%[0-9]+]]:gr32 = MOV32ri 4
; CHECK: $eax = COPY [[MOV32ri]]
; CHECK: RET 0, implicit $eax
%0(s32) = G_CONSTANT i32 4
$eax = COPY %0(s32)
RET 0, implicit $eax
...
---
name: const_i32_0
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr }
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: const_i32_0
; CHECK: [[MOV32r0_:%[0-9]+]]:gr32 = MOV32r0 implicit-def $eflags
; CHECK: $eax = COPY [[MOV32r0_]]
; CHECK: RET 0, implicit $eax
%0(s32) = G_CONSTANT i32 0
$eax = COPY %0(s32)
RET 0, implicit $eax
...
---
name: const_i64
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: gpr }
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: const_i64
; CHECK: [[MOV64ri:%[0-9]+]]:gr64 = MOV64ri 68719476720
; CHECK: $rax = COPY [[MOV64ri]]
; CHECK: RET 0, implicit $rax
%0(s64) = G_CONSTANT i64 68719476720
$rax = COPY %0(s64)
RET 0, implicit $rax
...
---
name: const_i64_u32
alignment: 16
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: gpr }
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: const_i64_u32
; CHECK: [[MOV32ri64_:%[0-9]+]]:gr64 = MOV32ri64 1879048192
; CHECK: $rax = COPY [[MOV32ri64_]]
; CHECK: RET 0, implicit $rax
%0(s64) = G_CONSTANT i64 1879048192
$rax = COPY %0(s64)
RET 0, implicit $rax
...
---
name: const_i64_i32
legalized: true
regBankSelected: true
selected: false
registers:
- { id: 0, class: gpr }
body: |
bb.1 (%ir-block.0):
; CHECK-LABEL: name: const_i64_i32
; CHECK: [[MOV64ri32_:%[0-9]+]]:gr64 = MOV64ri32 -1
; CHECK: $rax = COPY [[MOV64ri32_]]
; CHECK: RET 0, implicit $rax
%0(s64) = G_CONSTANT i64 -1
$rax = COPY %0(s64)
RET 0, implicit $rax
...
---
name: main
alignment: 16
legalized: true
regBankSelected: true
registers:
- { id: 0, class: gpr, preferred-register: '' }
- { id: 1, class: gpr, preferred-register: '' }
body: |
bb.1 (%ir-block.0):
liveins: $rdi
; CHECK-LABEL: name: main
; CHECK: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
; CHECK: [[MOV64ri32_:%[0-9]+]]:gr64 = MOV64ri32 0
; CHECK: MOV64mr [[COPY]], 1, $noreg, 0, $noreg, [[MOV64ri32_]] :: (store (p0) into %ir.data)
; CHECK: RET 0
%0(p0) = COPY $rdi
%1(p0) = G_CONSTANT i64 0
G_STORE %1(p0), %0(p0) :: (store (p0) into %ir.data)
RET 0
...