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a619b50bd5
Add support for the new pass manager to MemorySSA pass. Change MemorySSA to be computed eagerly upon construction. Change MemorySSAWalker to be owned by the MemorySSA object that creates it. Reviewers: dberlin, george.burgess.iv Subscribers: mcrosier, llvm-commits Differential Revision: http://reviews.llvm.org/D19664 llvm-svn: 271432
44 lines
1.7 KiB
LLVM
44 lines
1.7 KiB
LLVM
; RUN: opt -basicaa -memoryssa -analyze < %s 2>&1 | FileCheck %s
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; RUN: opt -aa-pipeline=basic-aa -passes='print<memoryssa>,verify<memoryssa>' -disable-output < %s 2>&1 | FileCheck %s
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;
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; This test ensures we don't end up with multiple reaching defs for a single
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; use/phi edge If we were to optimize defs, we would end up with 2=
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; MemoryDef(liveOnEntry) and 4 = MemoryDef(liveOnEntry) Both would mean both
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; 1,2, and 3,4 would reach the phi node. Because the phi node can only have one
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; entry on each edge, it would choose 2, 4 and disconnect 1 and 3 completely
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; from the SSA graph, even though they are not dead
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define void @sink_store(i32 %index, i32* %foo, i32* %bar) {
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entry:
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%cmp = trunc i32 %index to i1
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br i1 %cmp, label %if.then, label %if.else
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if.then: ; preds = %entry
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; CHECK: 1 = MemoryDef(liveOnEntry)
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; CHECK-NEXT: store i32 %index, i32* %foo, align 4
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store i32 %index, i32* %foo, align 4
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; CHECK: 2 = MemoryDef(1)
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; CHECK-NEXT: store i32 %index, i32* %bar, align 4
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store i32 %index, i32* %bar, align 4
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br label %if.end
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if.else: ; preds = %entry
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; CHECK: 3 = MemoryDef(liveOnEntry)
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; CHECK-NEXT: store i32 %index, i32* %foo, align 4
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store i32 %index, i32* %foo, align 4
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; CHECK: 4 = MemoryDef(3)
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; CHECK-NEXT: store i32 %index, i32* %bar, align 4
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store i32 %index, i32* %bar, align 4
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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; CHECK: 5 = MemoryPhi({if.then,2},{if.else,4})
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; CHECK: MemoryUse(5)
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; CHECK-NEXT: %c = load i32, i32* %foo
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%c = load i32, i32* %foo
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; CHECK: MemoryUse(5)
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; CHECK-NEXT: %d = load i32, i32* %bar
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%d = load i32, i32* %bar
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ret void
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}
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