mirror of
https://github.com/RPCS3/llvm-mirror.git
synced 2024-11-26 04:32:44 +01:00
1dcd9f1f31
This patch add the ISD::LRINT and ISD::LLRINT along with new intrinsics. The changes are straightforward as for other floating-point rounding functions, with just some adjustments required to handle the return value being an interger. The idea is to optimize lrint/llrint generation for AArch64 in a subsequent patch. Current semantic is just route it to libm symbol. Reviewed By: craig.topper Differential Revision: https://reviews.llvm.org/D62017 llvm-svn: 361875
26 lines
780 B
LLVM
26 lines
780 B
LLVM
; RUN: llc < %s -mtriple=arm-eabi -float-abi=soft | FileCheck %s --check-prefix=SOFTFP
|
|
; RUN: llc < %s -mtriple=arm-eabi -float-abi=hard | FileCheck %s --check-prefix=HARDFP
|
|
|
|
; SOFTFP-LABEL: testmsws_builtin:
|
|
; SOFTFP: bl lrintf
|
|
; HARDFP-LABEL: testmsws_builtin:
|
|
; HARDFP: bl lrintf
|
|
define i32 @testmsws_builtin(float %x) {
|
|
entry:
|
|
%0 = tail call i32 @llvm.lrint.i32.f32(float %x)
|
|
ret i32 %0
|
|
}
|
|
|
|
; SOFTFP-LABEL: testmswd_builtin:
|
|
; SOFTFP: bl lrint
|
|
; HARDFP-LABEL: testmswd_builtin:
|
|
; HARDFP: bl lrint
|
|
define i32 @testmswd_builtin(double %x) {
|
|
entry:
|
|
%0 = tail call i32 @llvm.lrint.i32.f64(double %x)
|
|
ret i32 %0
|
|
}
|
|
|
|
declare i32 @llvm.lrint.i32.f32(float) nounwind readnone
|
|
declare i32 @llvm.lrint.i32.f64(double) nounwind readnone
|