mirror of
https://github.com/RPCS3/llvm-mirror.git
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da4afc0c02
This reverts commit 0345d88de654259ae90494bf9b015416e2cccacb. Google internal backend uses EntrySU, we are looking into removing dependency on it. Differential Revision: https://reviews.llvm.org/D88018
752 lines
21 KiB
C++
752 lines
21 KiB
C++
//===- ScheduleDAG.cpp - Implement the ScheduleDAG class ------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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/// \file Implements the ScheduleDAG class, which is a base class used by
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/// scheduling implementation classes.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/CodeGen/ScheduleDAG.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/iterator_range.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/ScheduleHazardRecognizer.h"
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#include "llvm/CodeGen/SelectionDAGNodes.h"
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#include "llvm/CodeGen/TargetInstrInfo.h"
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#include "llvm/CodeGen/TargetRegisterInfo.h"
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#include "llvm/CodeGen/TargetSubtargetInfo.h"
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#include "llvm/Config/llvm-config.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/raw_ostream.h"
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#include <algorithm>
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#include <cassert>
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#include <iterator>
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#include <limits>
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#include <utility>
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#include <vector>
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using namespace llvm;
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#define DEBUG_TYPE "pre-RA-sched"
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STATISTIC(NumNewPredsAdded, "Number of times a single predecessor was added");
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STATISTIC(NumTopoInits,
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"Number of times the topological order has been recomputed");
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#ifndef NDEBUG
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static cl::opt<bool> StressSchedOpt(
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"stress-sched", cl::Hidden, cl::init(false),
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cl::desc("Stress test instruction scheduling"));
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#endif
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void SchedulingPriorityQueue::anchor() {}
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ScheduleDAG::ScheduleDAG(MachineFunction &mf)
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: TM(mf.getTarget()), TII(mf.getSubtarget().getInstrInfo()),
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TRI(mf.getSubtarget().getRegisterInfo()), MF(mf),
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MRI(mf.getRegInfo()) {
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#ifndef NDEBUG
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StressSched = StressSchedOpt;
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#endif
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}
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ScheduleDAG::~ScheduleDAG() = default;
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void ScheduleDAG::clearDAG() {
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SUnits.clear();
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EntrySU = SUnit();
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ExitSU = SUnit();
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}
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const MCInstrDesc *ScheduleDAG::getNodeDesc(const SDNode *Node) const {
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if (!Node || !Node->isMachineOpcode()) return nullptr;
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return &TII->get(Node->getMachineOpcode());
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}
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LLVM_DUMP_METHOD void SDep::dump(const TargetRegisterInfo *TRI) const {
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switch (getKind()) {
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case Data: dbgs() << "Data"; break;
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case Anti: dbgs() << "Anti"; break;
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case Output: dbgs() << "Out "; break;
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case Order: dbgs() << "Ord "; break;
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}
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switch (getKind()) {
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case Data:
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dbgs() << " Latency=" << getLatency();
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if (TRI && isAssignedRegDep())
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dbgs() << " Reg=" << printReg(getReg(), TRI);
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break;
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case Anti:
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case Output:
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dbgs() << " Latency=" << getLatency();
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break;
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case Order:
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dbgs() << " Latency=" << getLatency();
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switch(Contents.OrdKind) {
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case Barrier: dbgs() << " Barrier"; break;
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case MayAliasMem:
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case MustAliasMem: dbgs() << " Memory"; break;
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case Artificial: dbgs() << " Artificial"; break;
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case Weak: dbgs() << " Weak"; break;
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case Cluster: dbgs() << " Cluster"; break;
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}
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break;
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}
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}
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bool SUnit::addPred(const SDep &D, bool Required) {
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// If this node already has this dependence, don't add a redundant one.
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for (SDep &PredDep : Preds) {
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// Zero-latency weak edges may be added purely for heuristic ordering. Don't
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// add them if another kind of edge already exists.
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if (!Required && PredDep.getSUnit() == D.getSUnit())
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return false;
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if (PredDep.overlaps(D)) {
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// Extend the latency if needed. Equivalent to
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// removePred(PredDep) + addPred(D).
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if (PredDep.getLatency() < D.getLatency()) {
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SUnit *PredSU = PredDep.getSUnit();
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// Find the corresponding successor in N.
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SDep ForwardD = PredDep;
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ForwardD.setSUnit(this);
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for (SDep &SuccDep : PredSU->Succs) {
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if (SuccDep == ForwardD) {
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SuccDep.setLatency(D.getLatency());
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break;
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}
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}
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PredDep.setLatency(D.getLatency());
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}
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return false;
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}
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}
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// Now add a corresponding succ to N.
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SDep P = D;
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P.setSUnit(this);
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SUnit *N = D.getSUnit();
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// Update the bookkeeping.
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if (D.getKind() == SDep::Data) {
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assert(NumPreds < std::numeric_limits<unsigned>::max() &&
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"NumPreds will overflow!");
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assert(N->NumSuccs < std::numeric_limits<unsigned>::max() &&
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"NumSuccs will overflow!");
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++NumPreds;
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++N->NumSuccs;
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}
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if (!N->isScheduled) {
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if (D.isWeak()) {
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++WeakPredsLeft;
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}
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else {
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assert(NumPredsLeft < std::numeric_limits<unsigned>::max() &&
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"NumPredsLeft will overflow!");
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++NumPredsLeft;
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}
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}
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if (!isScheduled) {
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if (D.isWeak()) {
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++N->WeakSuccsLeft;
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}
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else {
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assert(N->NumSuccsLeft < std::numeric_limits<unsigned>::max() &&
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"NumSuccsLeft will overflow!");
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++N->NumSuccsLeft;
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}
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}
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Preds.push_back(D);
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N->Succs.push_back(P);
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if (P.getLatency() != 0) {
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this->setDepthDirty();
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N->setHeightDirty();
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}
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return true;
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}
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void SUnit::removePred(const SDep &D) {
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// Find the matching predecessor.
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SmallVectorImpl<SDep>::iterator I = llvm::find(Preds, D);
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if (I == Preds.end())
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return;
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// Find the corresponding successor in N.
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SDep P = D;
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P.setSUnit(this);
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SUnit *N = D.getSUnit();
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SmallVectorImpl<SDep>::iterator Succ = llvm::find(N->Succs, P);
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assert(Succ != N->Succs.end() && "Mismatching preds / succs lists!");
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N->Succs.erase(Succ);
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Preds.erase(I);
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// Update the bookkeeping.
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if (P.getKind() == SDep::Data) {
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assert(NumPreds > 0 && "NumPreds will underflow!");
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assert(N->NumSuccs > 0 && "NumSuccs will underflow!");
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--NumPreds;
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--N->NumSuccs;
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}
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if (!N->isScheduled) {
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if (D.isWeak())
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--WeakPredsLeft;
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else {
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assert(NumPredsLeft > 0 && "NumPredsLeft will underflow!");
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--NumPredsLeft;
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}
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}
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if (!isScheduled) {
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if (D.isWeak())
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--N->WeakSuccsLeft;
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else {
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assert(N->NumSuccsLeft > 0 && "NumSuccsLeft will underflow!");
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--N->NumSuccsLeft;
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}
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}
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if (P.getLatency() != 0) {
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this->setDepthDirty();
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N->setHeightDirty();
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}
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}
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void SUnit::setDepthDirty() {
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if (!isDepthCurrent) return;
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SmallVector<SUnit*, 8> WorkList;
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WorkList.push_back(this);
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do {
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SUnit *SU = WorkList.pop_back_val();
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SU->isDepthCurrent = false;
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for (SDep &SuccDep : SU->Succs) {
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SUnit *SuccSU = SuccDep.getSUnit();
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if (SuccSU->isDepthCurrent)
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WorkList.push_back(SuccSU);
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}
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} while (!WorkList.empty());
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}
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void SUnit::setHeightDirty() {
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if (!isHeightCurrent) return;
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SmallVector<SUnit*, 8> WorkList;
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WorkList.push_back(this);
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do {
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SUnit *SU = WorkList.pop_back_val();
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SU->isHeightCurrent = false;
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for (SDep &PredDep : SU->Preds) {
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SUnit *PredSU = PredDep.getSUnit();
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if (PredSU->isHeightCurrent)
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WorkList.push_back(PredSU);
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}
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} while (!WorkList.empty());
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}
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void SUnit::setDepthToAtLeast(unsigned NewDepth) {
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if (NewDepth <= getDepth())
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return;
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setDepthDirty();
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Depth = NewDepth;
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isDepthCurrent = true;
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}
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void SUnit::setHeightToAtLeast(unsigned NewHeight) {
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if (NewHeight <= getHeight())
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return;
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setHeightDirty();
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Height = NewHeight;
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isHeightCurrent = true;
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}
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/// Calculates the maximal path from the node to the exit.
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void SUnit::ComputeDepth() {
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SmallVector<SUnit*, 8> WorkList;
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WorkList.push_back(this);
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do {
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SUnit *Cur = WorkList.back();
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bool Done = true;
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unsigned MaxPredDepth = 0;
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for (const SDep &PredDep : Cur->Preds) {
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SUnit *PredSU = PredDep.getSUnit();
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if (PredSU->isDepthCurrent)
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MaxPredDepth = std::max(MaxPredDepth,
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PredSU->Depth + PredDep.getLatency());
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else {
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Done = false;
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WorkList.push_back(PredSU);
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}
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}
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if (Done) {
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WorkList.pop_back();
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if (MaxPredDepth != Cur->Depth) {
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Cur->setDepthDirty();
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Cur->Depth = MaxPredDepth;
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}
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Cur->isDepthCurrent = true;
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}
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} while (!WorkList.empty());
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}
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/// Calculates the maximal path from the node to the entry.
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void SUnit::ComputeHeight() {
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SmallVector<SUnit*, 8> WorkList;
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WorkList.push_back(this);
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do {
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SUnit *Cur = WorkList.back();
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bool Done = true;
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unsigned MaxSuccHeight = 0;
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for (const SDep &SuccDep : Cur->Succs) {
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SUnit *SuccSU = SuccDep.getSUnit();
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if (SuccSU->isHeightCurrent)
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MaxSuccHeight = std::max(MaxSuccHeight,
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SuccSU->Height + SuccDep.getLatency());
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else {
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Done = false;
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WorkList.push_back(SuccSU);
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}
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}
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if (Done) {
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WorkList.pop_back();
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if (MaxSuccHeight != Cur->Height) {
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Cur->setHeightDirty();
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Cur->Height = MaxSuccHeight;
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}
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Cur->isHeightCurrent = true;
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}
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} while (!WorkList.empty());
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}
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void SUnit::biasCriticalPath() {
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if (NumPreds < 2)
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return;
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SUnit::pred_iterator BestI = Preds.begin();
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unsigned MaxDepth = BestI->getSUnit()->getDepth();
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for (SUnit::pred_iterator I = std::next(BestI), E = Preds.end(); I != E;
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++I) {
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if (I->getKind() == SDep::Data && I->getSUnit()->getDepth() > MaxDepth)
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BestI = I;
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}
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if (BestI != Preds.begin())
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std::swap(*Preds.begin(), *BestI);
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}
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#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP)
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LLVM_DUMP_METHOD void SUnit::dumpAttributes() const {
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dbgs() << " # preds left : " << NumPredsLeft << "\n";
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dbgs() << " # succs left : " << NumSuccsLeft << "\n";
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if (WeakPredsLeft)
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dbgs() << " # weak preds left : " << WeakPredsLeft << "\n";
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if (WeakSuccsLeft)
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dbgs() << " # weak succs left : " << WeakSuccsLeft << "\n";
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dbgs() << " # rdefs left : " << NumRegDefsLeft << "\n";
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dbgs() << " Latency : " << Latency << "\n";
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dbgs() << " Depth : " << getDepth() << "\n";
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dbgs() << " Height : " << getHeight() << "\n";
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}
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LLVM_DUMP_METHOD void ScheduleDAG::dumpNodeName(const SUnit &SU) const {
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if (&SU == &EntrySU)
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dbgs() << "EntrySU";
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else if (&SU == &ExitSU)
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dbgs() << "ExitSU";
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else
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dbgs() << "SU(" << SU.NodeNum << ")";
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}
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LLVM_DUMP_METHOD void ScheduleDAG::dumpNodeAll(const SUnit &SU) const {
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dumpNode(SU);
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SU.dumpAttributes();
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if (SU.Preds.size() > 0) {
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dbgs() << " Predecessors:\n";
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for (const SDep &Dep : SU.Preds) {
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dbgs() << " ";
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dumpNodeName(*Dep.getSUnit());
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dbgs() << ": ";
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Dep.dump(TRI);
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dbgs() << '\n';
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}
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}
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if (SU.Succs.size() > 0) {
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dbgs() << " Successors:\n";
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for (const SDep &Dep : SU.Succs) {
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dbgs() << " ";
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dumpNodeName(*Dep.getSUnit());
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dbgs() << ": ";
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Dep.dump(TRI);
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dbgs() << '\n';
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}
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}
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}
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#endif
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#ifndef NDEBUG
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unsigned ScheduleDAG::VerifyScheduledDAG(bool isBottomUp) {
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bool AnyNotSched = false;
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unsigned DeadNodes = 0;
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for (const SUnit &SUnit : SUnits) {
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if (!SUnit.isScheduled) {
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if (SUnit.NumPreds == 0 && SUnit.NumSuccs == 0) {
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++DeadNodes;
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continue;
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}
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if (!AnyNotSched)
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dbgs() << "*** Scheduling failed! ***\n";
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dumpNode(SUnit);
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dbgs() << "has not been scheduled!\n";
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AnyNotSched = true;
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}
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if (SUnit.isScheduled &&
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(isBottomUp ? SUnit.getHeight() : SUnit.getDepth()) >
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unsigned(std::numeric_limits<int>::max())) {
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if (!AnyNotSched)
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dbgs() << "*** Scheduling failed! ***\n";
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dumpNode(SUnit);
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dbgs() << "has an unexpected "
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<< (isBottomUp ? "Height" : "Depth") << " value!\n";
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AnyNotSched = true;
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}
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if (isBottomUp) {
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if (SUnit.NumSuccsLeft != 0) {
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if (!AnyNotSched)
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dbgs() << "*** Scheduling failed! ***\n";
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dumpNode(SUnit);
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dbgs() << "has successors left!\n";
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AnyNotSched = true;
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}
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} else {
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if (SUnit.NumPredsLeft != 0) {
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if (!AnyNotSched)
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dbgs() << "*** Scheduling failed! ***\n";
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dumpNode(SUnit);
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dbgs() << "has predecessors left!\n";
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AnyNotSched = true;
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}
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}
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}
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assert(!AnyNotSched);
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return SUnits.size() - DeadNodes;
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}
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#endif
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void ScheduleDAGTopologicalSort::InitDAGTopologicalSorting() {
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// The idea of the algorithm is taken from
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// "Online algorithms for managing the topological order of
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// a directed acyclic graph" by David J. Pearce and Paul H.J. Kelly
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// This is the MNR algorithm, which was first introduced by
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// A. Marchetti-Spaccamela, U. Nanni and H. Rohnert in
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// "Maintaining a topological order under edge insertions".
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//
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// Short description of the algorithm:
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//
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// Topological ordering, ord, of a DAG maps each node to a topological
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// index so that for all edges X->Y it is the case that ord(X) < ord(Y).
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//
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// This means that if there is a path from the node X to the node Z,
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// then ord(X) < ord(Z).
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//
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// This property can be used to check for reachability of nodes:
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// if Z is reachable from X, then an insertion of the edge Z->X would
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// create a cycle.
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//
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// The algorithm first computes a topological ordering for the DAG by
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// initializing the Index2Node and Node2Index arrays and then tries to keep
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// the ordering up-to-date after edge insertions by reordering the DAG.
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//
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// On insertion of the edge X->Y, the algorithm first marks by calling DFS
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// the nodes reachable from Y, and then shifts them using Shift to lie
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// immediately after X in Index2Node.
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// Cancel pending updates, mark as valid.
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Dirty = false;
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Updates.clear();
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unsigned DAGSize = SUnits.size();
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std::vector<SUnit*> WorkList;
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WorkList.reserve(DAGSize);
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Index2Node.resize(DAGSize);
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Node2Index.resize(DAGSize);
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// Initialize the data structures.
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if (ExitSU)
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WorkList.push_back(ExitSU);
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for (SUnit &SU : SUnits) {
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int NodeNum = SU.NodeNum;
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unsigned Degree = SU.Succs.size();
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// Temporarily use the Node2Index array as scratch space for degree counts.
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Node2Index[NodeNum] = Degree;
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// Is it a node without dependencies?
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if (Degree == 0) {
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assert(SU.Succs.empty() && "SUnit should have no successors");
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// Collect leaf nodes.
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WorkList.push_back(&SU);
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}
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}
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int Id = DAGSize;
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while (!WorkList.empty()) {
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SUnit *SU = WorkList.back();
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WorkList.pop_back();
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if (SU->NodeNum < DAGSize)
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Allocate(SU->NodeNum, --Id);
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for (const SDep &PredDep : SU->Preds) {
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SUnit *SU = PredDep.getSUnit();
|
|
if (SU->NodeNum < DAGSize && !--Node2Index[SU->NodeNum])
|
|
// If all dependencies of the node are processed already,
|
|
// then the node can be computed now.
|
|
WorkList.push_back(SU);
|
|
}
|
|
}
|
|
|
|
Visited.resize(DAGSize);
|
|
NumTopoInits++;
|
|
|
|
#ifndef NDEBUG
|
|
// Check correctness of the ordering
|
|
for (SUnit &SU : SUnits) {
|
|
for (const SDep &PD : SU.Preds) {
|
|
assert(Node2Index[SU.NodeNum] > Node2Index[PD.getSUnit()->NodeNum] &&
|
|
"Wrong topological sorting");
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
|
|
void ScheduleDAGTopologicalSort::FixOrder() {
|
|
// Recompute from scratch after new nodes have been added.
|
|
if (Dirty) {
|
|
InitDAGTopologicalSorting();
|
|
return;
|
|
}
|
|
|
|
// Otherwise apply updates one-by-one.
|
|
for (auto &U : Updates)
|
|
AddPred(U.first, U.second);
|
|
Updates.clear();
|
|
}
|
|
|
|
void ScheduleDAGTopologicalSort::AddPredQueued(SUnit *Y, SUnit *X) {
|
|
// Recomputing the order from scratch is likely more efficient than applying
|
|
// updates one-by-one for too many updates. The current cut-off is arbitrarily
|
|
// chosen.
|
|
Dirty = Dirty || Updates.size() > 10;
|
|
|
|
if (Dirty)
|
|
return;
|
|
|
|
Updates.emplace_back(Y, X);
|
|
}
|
|
|
|
void ScheduleDAGTopologicalSort::AddPred(SUnit *Y, SUnit *X) {
|
|
int UpperBound, LowerBound;
|
|
LowerBound = Node2Index[Y->NodeNum];
|
|
UpperBound = Node2Index[X->NodeNum];
|
|
bool HasLoop = false;
|
|
// Is Ord(X) < Ord(Y) ?
|
|
if (LowerBound < UpperBound) {
|
|
// Update the topological order.
|
|
Visited.reset();
|
|
DFS(Y, UpperBound, HasLoop);
|
|
assert(!HasLoop && "Inserted edge creates a loop!");
|
|
// Recompute topological indexes.
|
|
Shift(Visited, LowerBound, UpperBound);
|
|
}
|
|
|
|
NumNewPredsAdded++;
|
|
}
|
|
|
|
void ScheduleDAGTopologicalSort::RemovePred(SUnit *M, SUnit *N) {
|
|
// InitDAGTopologicalSorting();
|
|
}
|
|
|
|
void ScheduleDAGTopologicalSort::DFS(const SUnit *SU, int UpperBound,
|
|
bool &HasLoop) {
|
|
std::vector<const SUnit*> WorkList;
|
|
WorkList.reserve(SUnits.size());
|
|
|
|
WorkList.push_back(SU);
|
|
do {
|
|
SU = WorkList.back();
|
|
WorkList.pop_back();
|
|
Visited.set(SU->NodeNum);
|
|
for (const SDep &SuccDep
|
|
: make_range(SU->Succs.rbegin(), SU->Succs.rend())) {
|
|
unsigned s = SuccDep.getSUnit()->NodeNum;
|
|
// Edges to non-SUnits are allowed but ignored (e.g. ExitSU).
|
|
if (s >= Node2Index.size())
|
|
continue;
|
|
if (Node2Index[s] == UpperBound) {
|
|
HasLoop = true;
|
|
return;
|
|
}
|
|
// Visit successors if not already and in affected region.
|
|
if (!Visited.test(s) && Node2Index[s] < UpperBound) {
|
|
WorkList.push_back(SuccDep.getSUnit());
|
|
}
|
|
}
|
|
} while (!WorkList.empty());
|
|
}
|
|
|
|
std::vector<int> ScheduleDAGTopologicalSort::GetSubGraph(const SUnit &StartSU,
|
|
const SUnit &TargetSU,
|
|
bool &Success) {
|
|
std::vector<const SUnit*> WorkList;
|
|
int LowerBound = Node2Index[StartSU.NodeNum];
|
|
int UpperBound = Node2Index[TargetSU.NodeNum];
|
|
bool Found = false;
|
|
BitVector VisitedBack;
|
|
std::vector<int> Nodes;
|
|
|
|
if (LowerBound > UpperBound) {
|
|
Success = false;
|
|
return Nodes;
|
|
}
|
|
|
|
WorkList.reserve(SUnits.size());
|
|
Visited.reset();
|
|
|
|
// Starting from StartSU, visit all successors up
|
|
// to UpperBound.
|
|
WorkList.push_back(&StartSU);
|
|
do {
|
|
const SUnit *SU = WorkList.back();
|
|
WorkList.pop_back();
|
|
for (int I = SU->Succs.size()-1; I >= 0; --I) {
|
|
const SUnit *Succ = SU->Succs[I].getSUnit();
|
|
unsigned s = Succ->NodeNum;
|
|
// Edges to non-SUnits are allowed but ignored (e.g. ExitSU).
|
|
if (Succ->isBoundaryNode())
|
|
continue;
|
|
if (Node2Index[s] == UpperBound) {
|
|
Found = true;
|
|
continue;
|
|
}
|
|
// Visit successors if not already and in affected region.
|
|
if (!Visited.test(s) && Node2Index[s] < UpperBound) {
|
|
Visited.set(s);
|
|
WorkList.push_back(Succ);
|
|
}
|
|
}
|
|
} while (!WorkList.empty());
|
|
|
|
if (!Found) {
|
|
Success = false;
|
|
return Nodes;
|
|
}
|
|
|
|
WorkList.clear();
|
|
VisitedBack.resize(SUnits.size());
|
|
Found = false;
|
|
|
|
// Starting from TargetSU, visit all predecessors up
|
|
// to LowerBound. SUs that are visited by the two
|
|
// passes are added to Nodes.
|
|
WorkList.push_back(&TargetSU);
|
|
do {
|
|
const SUnit *SU = WorkList.back();
|
|
WorkList.pop_back();
|
|
for (int I = SU->Preds.size()-1; I >= 0; --I) {
|
|
const SUnit *Pred = SU->Preds[I].getSUnit();
|
|
unsigned s = Pred->NodeNum;
|
|
// Edges to non-SUnits are allowed but ignored (e.g. EntrySU).
|
|
if (Pred->isBoundaryNode())
|
|
continue;
|
|
if (Node2Index[s] == LowerBound) {
|
|
Found = true;
|
|
continue;
|
|
}
|
|
if (!VisitedBack.test(s) && Visited.test(s)) {
|
|
VisitedBack.set(s);
|
|
WorkList.push_back(Pred);
|
|
Nodes.push_back(s);
|
|
}
|
|
}
|
|
} while (!WorkList.empty());
|
|
|
|
assert(Found && "Error in SUnit Graph!");
|
|
Success = true;
|
|
return Nodes;
|
|
}
|
|
|
|
void ScheduleDAGTopologicalSort::Shift(BitVector& Visited, int LowerBound,
|
|
int UpperBound) {
|
|
std::vector<int> L;
|
|
int shift = 0;
|
|
int i;
|
|
|
|
for (i = LowerBound; i <= UpperBound; ++i) {
|
|
// w is node at topological index i.
|
|
int w = Index2Node[i];
|
|
if (Visited.test(w)) {
|
|
// Unmark.
|
|
Visited.reset(w);
|
|
L.push_back(w);
|
|
shift = shift + 1;
|
|
} else {
|
|
Allocate(w, i - shift);
|
|
}
|
|
}
|
|
|
|
for (unsigned LI : L) {
|
|
Allocate(LI, i - shift);
|
|
i = i + 1;
|
|
}
|
|
}
|
|
|
|
bool ScheduleDAGTopologicalSort::WillCreateCycle(SUnit *TargetSU, SUnit *SU) {
|
|
FixOrder();
|
|
// Is SU reachable from TargetSU via successor edges?
|
|
if (IsReachable(SU, TargetSU))
|
|
return true;
|
|
for (const SDep &PredDep : TargetSU->Preds)
|
|
if (PredDep.isAssignedRegDep() &&
|
|
IsReachable(SU, PredDep.getSUnit()))
|
|
return true;
|
|
return false;
|
|
}
|
|
|
|
void ScheduleDAGTopologicalSort::AddSUnitWithoutPredecessors(const SUnit *SU) {
|
|
assert(SU->NodeNum == Index2Node.size() && "Node cannot be added at the end");
|
|
assert(SU->NumPreds == 0 && "Can only add SU's with no predecessors");
|
|
Node2Index.push_back(Index2Node.size());
|
|
Index2Node.push_back(SU->NodeNum);
|
|
Visited.resize(Node2Index.size());
|
|
}
|
|
|
|
bool ScheduleDAGTopologicalSort::IsReachable(const SUnit *SU,
|
|
const SUnit *TargetSU) {
|
|
FixOrder();
|
|
// If insertion of the edge SU->TargetSU would create a cycle
|
|
// then there is a path from TargetSU to SU.
|
|
int UpperBound, LowerBound;
|
|
LowerBound = Node2Index[TargetSU->NodeNum];
|
|
UpperBound = Node2Index[SU->NodeNum];
|
|
bool HasLoop = false;
|
|
// Is Ord(TargetSU) < Ord(SU) ?
|
|
if (LowerBound < UpperBound) {
|
|
Visited.reset();
|
|
// There may be a path from TargetSU to SU. Check for it.
|
|
DFS(TargetSU, UpperBound, HasLoop);
|
|
}
|
|
return HasLoop;
|
|
}
|
|
|
|
void ScheduleDAGTopologicalSort::Allocate(int n, int index) {
|
|
Node2Index[n] = index;
|
|
Index2Node[index] = n;
|
|
}
|
|
|
|
ScheduleDAGTopologicalSort::
|
|
ScheduleDAGTopologicalSort(std::vector<SUnit> &sunits, SUnit *exitsu)
|
|
: SUnits(sunits), ExitSU(exitsu) {}
|
|
|
|
ScheduleHazardRecognizer::~ScheduleHazardRecognizer() = default;
|