Dmitry Preobrazhensky f571a2ff8a [AMDGPU][MC] Corrected disassembler to decode instructions with 2 literals ... See bug 32922: https://bugs.llvm.org//show_bug.cgi?id=32922 Reviewers: artem.tamazov, vpykhtin Differential Revision: https://reviews.llvm.org/D32912 llvm-svn: 303428		2017-05-19 14:27:52 +00:00
..
AArch64	AArch64: diagnose unrecognized features in .cpu directive.	2017-05-15 19:42:15 +00:00
AMDGPU	[AMDGPU][MC] Fixed bugs in export instruction	2017-05-19 13:36:09 +00:00
ARM	[ARM] Clear the constant pool cache on explicit .ltorg directives	2017-05-08 10:26:24 +00:00
AsmParser	[LLVM][inline-asm] Altmacro string escape character '!'	2017-05-10 13:08:11 +00:00
AVR	[AVR] Fix a bug so that we now emit R_AVR_16 fixups with the correct offset	2017-04-30 23:33:52 +00:00
COFF	MC/COFF: Do not emit forward associative section referenceds.	2017-02-17 17:32:54 +00:00
Disassembler	[AMDGPU][MC] Corrected disassembler to decode instructions with 2 literals	2017-05-19 14:27:52 +00:00
ELF	Add llvm::object::getELFSectionTypeName().	2017-05-02 14:04:52 +00:00
Hexagon	[Hexagon] Change iconst to emit 27bit relocation	2017-05-02 18:19:11 +00:00
Lanai
MachO	MCMacho: Allow __thread_ptr section after dwarf sections	2017-02-01 01:31:36 +00:00
Markup
Mips	[mips] Emit R_MICROMIPS_TLS_GOTTPREL relocation for %gottprel in case of microMIPS	2017-04-30 04:27:23 +00:00
PowerPC	[PowerPC][Altivec] Add mfvrd and mffprd extended mnemonic	2017-03-15 16:04:53 +00:00
Sparc	[Sparc] Remove execute permissions from non-executable text files	2017-05-17 11:05:20 +00:00
SystemZ	[SystemZ] Add miscellaneous instructions	2017-05-10 14:20:15 +00:00
WebAssembly	[WebAssembly] Add size of section header to data relocation offsets.	2017-04-28 21:22:38 +00:00
X86	[X86][LWP] Add llvm support for LWP instructions (reapplied).	2017-05-03 15:51:39 +00:00