Zoran Jovanovic 618c7b08b2 Test case micromips-load-effective-address.s renamed to micromips-load-effective-address.ll and moved to test/CodeGen/Mips. ... llvm-svn: 199221		2014-01-14 16:26:47 +00:00
..
AArch64	[AArch64] Fix assertion failure caused by an invalid comparison between APInt values.	2014-01-13 16:51:00 +00:00
ARM	ARM: add constraint that RdLo != Rn != RdHi for v5 MLA insts.	2014-01-14 13:05:47 +00:00
CPP	Begin adding docs and IR-level support for the inalloca attribute	2013-12-19 02:14:12 +00:00
Generic	Remove a failing test to get the buildbots back to green.	2014-01-06 00:43:09 +00:00
Hexagon	Debug Info: update testing cases to specify the debug info version number.	2013-11-22 21:49:45 +00:00
Inputs	Debug Info: update testing cases to specify the debug info version number.	2013-11-22 21:49:45 +00:00
Mips	Test case micromips-load-effective-address.s renamed to micromips-load-effective-address.ll and moved to test/CodeGen/Mips.	2014-01-14 16:26:47 +00:00
MSP430	Make sure SP is always aligned on a 2 byte boundary	2013-10-24 09:32:31 +00:00
NVPTX	Fix non-deterministic SDNodeOrder-dependent codegen	2014-01-12 14:09:17 +00:00
PowerPC	Implement initial-exec TLS for PPC32.	2013-12-20 18:08:54 +00:00
R600	Fix broken CHECK lines.	2014-01-11 21:06:00 +00:00
SPARC	Always let value types influence register classes.	2014-01-14 06:18:38 +00:00
SystemZ	[SystemZ] Flesh out stackrestore test (frame-11.ll)	2014-01-13 15:44:44 +00:00
Thumb	Fix broken CHECK lines.	2014-01-11 21:06:00 +00:00
Thumb2	Fix PR 18369: [Thumbv8] asserts due to inconsistent CPSR liveness of IT blocks	2014-01-13 18:47:54 +00:00
X86	Handle dllexport for global aliases	2014-01-14 15:23:25 +00:00
XCore	Fix broken CHECK lines.	2014-01-11 21:06:00 +00:00