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61cee25d5f
I'm proposing a fold for increment-of-sexted-bool in: https://reviews.llvm.org/D31944 ...so we need to know what happens in more cases like these. llvm-svn: 301269
72 lines
2.2 KiB
LLVM
72 lines
2.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=arm-eabi -mattr=neon | FileCheck %s
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define i32 @sext_inc(i1 zeroext %x) {
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; CHECK-LABEL: sext_inc:
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; CHECK: @ BB#0:
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; CHECK-NEXT: rsb r0, r0, #1
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; CHECK-NEXT: mov pc, lr
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%ext = sext i1 %x to i32
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%add = add i32 %ext, 1
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ret i32 %add
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}
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define <4 x i32> @sext_inc_vec(<4 x i1> %x) {
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; CHECK-LABEL: sext_inc_vec:
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; CHECK: @ BB#0:
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; CHECK-NEXT: vmov d16, r0, r1
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; CHECK-NEXT: vmov.i32 q9, #0x1f
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; CHECK-NEXT: vmov.i32 q10, #0x1
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; CHECK-NEXT: vmovl.u16 q8, d16
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; CHECK-NEXT: vneg.s32 q9, q9
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; CHECK-NEXT: vshl.i32 q8, q8, #31
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; CHECK-NEXT: vshl.s32 q8, q8, q9
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; CHECK-NEXT: vadd.i32 q8, q8, q10
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; CHECK-NEXT: vmov r0, r1, d16
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; CHECK-NEXT: vmov r2, r3, d17
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; CHECK-NEXT: mov pc, lr
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%ext = sext <4 x i1> %x to <4 x i32>
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%add = add <4 x i32> %ext, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %add
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}
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define <4 x i32> @cmpgt_sext_inc_vec(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: cmpgt_sext_inc_vec:
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; CHECK: @ BB#0:
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; CHECK-NEXT: mov r12, sp
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; CHECK-NEXT: vmov d19, r2, r3
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; CHECK-NEXT: vmov.i32 q10, #0x1
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; CHECK-NEXT: vld1.64 {d16, d17}, [r12]
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; CHECK-NEXT: vmov d18, r0, r1
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; CHECK-NEXT: vcgt.s32 q8, q9, q8
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; CHECK-NEXT: vadd.i32 q8, q8, q10
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; CHECK-NEXT: vmov r0, r1, d16
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; CHECK-NEXT: vmov r2, r3, d17
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; CHECK-NEXT: mov pc, lr
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%cmp = icmp sgt <4 x i32> %x, %y
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%ext = sext <4 x i1> %cmp to <4 x i32>
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%add = add <4 x i32> %ext, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %add
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}
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define <4 x i32> @cmpne_sext_inc_vec(<4 x i32> %x, <4 x i32> %y) {
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; CHECK-LABEL: cmpne_sext_inc_vec:
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; CHECK: @ BB#0:
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; CHECK-NEXT: mov r12, sp
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; CHECK-NEXT: vmov d19, r2, r3
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; CHECK-NEXT: vld1.64 {d16, d17}, [r12]
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; CHECK-NEXT: vmov d18, r0, r1
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; CHECK-NEXT: vceq.i32 q8, q9, q8
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; CHECK-NEXT: vmov.i32 q9, #0x1
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; CHECK-NEXT: vmvn q8, q8
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; CHECK-NEXT: vadd.i32 q8, q8, q9
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; CHECK-NEXT: vmov r0, r1, d16
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; CHECK-NEXT: vmov r2, r3, d17
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; CHECK-NEXT: mov pc, lr
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%cmp = icmp ne <4 x i32> %x, %y
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%ext = sext <4 x i1> %cmp to <4 x i32>
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%add = add <4 x i32> %ext, <i32 1, i32 1, i32 1, i32 1>
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ret <4 x i32> %add
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}
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