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In the presence of variable-sized stack objects, we always picked the base pointer when resolving frame indices if it was available. This makes us hit an assert where we can't reach the emergency spill slot if it's too far away from the base pointer. Since on AArch64 we decide to place the emergency spill slot at the top of the frame, it makes more sense to use FP to access it. The changes here don't affect only emergency spill slots but all the frame indices. The goal here is to try to choose between FP, BP and SP so that we minimize the offset and avoid scavenging, or worse, asserting when trying to access a slot allocated by the scavenger. Previously discussed here: https://reviews.llvm.org/D40876. Differential Revision: https://reviews.llvm.org/D45358 llvm-svn: 329691
28 lines
869 B
LLVM
28 lines
869 B
LLVM
; RUN: llc -mtriple=arm64-eabi -mcpu=cyclone < %s | FileCheck %s
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; CHECK: foo
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; CHECK-DAG: stur w[[REG0:[0-9]+]], [x29, #-24]
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; CHECK-DAG: stur w[[REG0]], [x29, #-20]
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define i32 @foo(i32 %a) nounwind {
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%retval = alloca i32, align 4
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%a.addr = alloca i32, align 4
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%arr = alloca [32 x i32], align 4
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%i = alloca i32, align 4
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%arr2 = alloca [32 x i32], align 4
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%j = alloca i32, align 4
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store i32 %a, i32* %a.addr, align 4
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%tmp = load i32, i32* %a.addr, align 4
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%tmp1 = zext i32 %tmp to i64
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%v = mul i64 4, %tmp1
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%vla = alloca i8, i64 %v, align 4
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%tmp2 = bitcast i8* %vla to i32*
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%tmp3 = load i32, i32* %a.addr, align 4
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store i32 %tmp3, i32* %i, align 4
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%tmp4 = load i32, i32* %a.addr, align 4
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store i32 %tmp4, i32* %j, align 4
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%tmp5 = load i32, i32* %j, align 4
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store i32 %tmp5, i32* %retval
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%x = load i32, i32* %retval
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ret i32 %x
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}
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