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c3f1114c60
Relanding after rewriting undef.ll test to avoid host-dependant
endianness.
As discussed in D34087, rewrite areNonVolatileConsecutiveLoads using
generic checks. Also, propagate missing local handling from there to
BaseIndexOffset checks.
Tests of note:
* test/CodeGen/X86/build-vector* - Improved.
* test/CodeGen/BPF/undef.ll - Improved store alignment allows an
additional store merge
* test/CodeGen/X86/clear_upper_vector_element_bits.ll - This is a
case we already do not handle well. Here, the DAG is improved, but
scheduling causes a code size degradation.
Reviewers: RKSimon, craig.topper, spatel, andreadb, filcab
Subscribers: nemanjai, llvm-commits
Differential Revision: https://reviews.llvm.org/D34472
llvm-svn: 307114
174 lines
5.5 KiB
LLVM
174 lines
5.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown | FileCheck %s --check-prefix=X86
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+movbe | FileCheck %s --check-prefix=X86-MOVBE
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown | FileCheck %s --check-prefix=X64
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+movbe | FileCheck %s --check-prefix=X64-MOVBE
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declare i64 @llvm.bswap.i64(i64)
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declare i128 @llvm.bswap.i128(i128)
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declare i256 @llvm.bswap.i256(i256)
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define i64 @bswap_i64(i64 %a0) nounwind {
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; X86-LABEL: bswap_i64:
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; X86: # BB#0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: bswapl %eax
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; X86-NEXT: bswapl %edx
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; X86-NEXT: retl
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;
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; X86-MOVBE-LABEL: bswap_i64:
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; X86-MOVBE: # BB#0:
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; X86-MOVBE-NEXT: movbel {{[0-9]+}}(%esp), %eax
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; X86-MOVBE-NEXT: movbel {{[0-9]+}}(%esp), %edx
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; X86-MOVBE-NEXT: retl
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;
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; X64-LABEL: bswap_i64:
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; X64: # BB#0:
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; X64-NEXT: bswapq %rdi
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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;
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; X64-MOVBE-LABEL: bswap_i64:
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; X64-MOVBE: # BB#0:
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; X64-MOVBE-NEXT: bswapq %rdi
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; X64-MOVBE-NEXT: movq %rdi, %rax
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; X64-MOVBE-NEXT: retq
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%1 = call i64 @llvm.bswap.i64(i64 %a0)
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ret i64 %1
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}
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define i128 @bswap_i128(i128 %a0) nounwind {
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; X86-LABEL: bswap_i128:
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; X86: # BB#0:
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; X86-NEXT: pushl %edi
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; X86-NEXT: pushl %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-NEXT: bswapl %edi
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; X86-NEXT: bswapl %esi
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; X86-NEXT: bswapl %edx
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; X86-NEXT: bswapl %ecx
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; X86-NEXT: movl %ecx, 12(%eax)
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; X86-NEXT: movl %edx, 8(%eax)
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; X86-NEXT: movl %esi, 4(%eax)
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; X86-NEXT: movl %edi, (%eax)
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; X86-NEXT: popl %esi
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; X86-NEXT: popl %edi
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; X86-NEXT: retl $4
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;
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; X86-MOVBE-LABEL: bswap_i128:
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; X86-MOVBE: # BB#0:
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; X86-MOVBE-NEXT: pushl %edi
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; X86-MOVBE-NEXT: pushl %esi
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-MOVBE-NEXT: movbel %esi, 12(%eax)
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; X86-MOVBE-NEXT: movbel %edi, 8(%eax)
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; X86-MOVBE-NEXT: movbel %edx, 4(%eax)
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; X86-MOVBE-NEXT: movbel %ecx, (%eax)
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; X86-MOVBE-NEXT: popl %esi
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; X86-MOVBE-NEXT: popl %edi
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; X86-MOVBE-NEXT: retl $4
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;
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; X64-LABEL: bswap_i128:
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; X64: # BB#0:
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; X64-NEXT: bswapq %rsi
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; X64-NEXT: bswapq %rdi
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; X64-NEXT: movq %rsi, %rax
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; X64-NEXT: movq %rdi, %rdx
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; X64-NEXT: retq
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;
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; X64-MOVBE-LABEL: bswap_i128:
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; X64-MOVBE: # BB#0:
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; X64-MOVBE-NEXT: bswapq %rsi
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; X64-MOVBE-NEXT: bswapq %rdi
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; X64-MOVBE-NEXT: movq %rsi, %rax
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; X64-MOVBE-NEXT: movq %rdi, %rdx
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; X64-MOVBE-NEXT: retq
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%1 = call i128 @llvm.bswap.i128(i128 %a0)
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ret i128 %1
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}
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define i256 @bswap_i256(i256 %a0) nounwind {
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; X86-LABEL: bswap_i256:
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; X86: # BB#0:
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; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: bswapl %ecx
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; X86-NEXT: movl %ecx, 28(%eax)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: bswapl %ecx
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; X86-NEXT: movl %ecx, 24(%eax)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: bswapl %ecx
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; X86-NEXT: movl %ecx, 20(%eax)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: bswapl %ecx
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; X86-NEXT: movl %ecx, 16(%eax)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: bswapl %ecx
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; X86-NEXT: movl %ecx, 12(%eax)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: bswapl %ecx
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; X86-NEXT: movl %ecx, 8(%eax)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: bswapl %ecx
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; X86-NEXT: movl %ecx, 4(%eax)
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; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-NEXT: bswapl %ecx
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; X86-NEXT: movl %ecx, (%eax)
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; X86-NEXT: retl $4
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;
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; X86-MOVBE-LABEL: bswap_i256:
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; X86-MOVBE: # BB#0:
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-MOVBE-NEXT: movbel %ecx, 28(%eax)
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-MOVBE-NEXT: movbel %ecx, 24(%eax)
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-MOVBE-NEXT: movbel %ecx, 20(%eax)
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-MOVBE-NEXT: movbel %ecx, 16(%eax)
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-MOVBE-NEXT: movbel %ecx, 12(%eax)
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-MOVBE-NEXT: movbel %ecx, 8(%eax)
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-MOVBE-NEXT: movbel %ecx, 4(%eax)
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; X86-MOVBE-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-MOVBE-NEXT: movbel %ecx, (%eax)
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; X86-MOVBE-NEXT: retl $4
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;
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; X64-LABEL: bswap_i256:
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; X64: # BB#0:
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; X64-NEXT: bswapq %r8
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; X64-NEXT: bswapq %rcx
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; X64-NEXT: bswapq %rdx
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; X64-NEXT: bswapq %rsi
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; X64-NEXT: movq %rsi, 24(%rdi)
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; X64-NEXT: movq %rdx, 16(%rdi)
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; X64-NEXT: movq %rcx, 8(%rdi)
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; X64-NEXT: movq %r8, (%rdi)
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; X64-NEXT: movq %rdi, %rax
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; X64-NEXT: retq
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;
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; X64-MOVBE-LABEL: bswap_i256:
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; X64-MOVBE: # BB#0:
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; X64-MOVBE-NEXT: movbeq %rsi, 24(%rdi)
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; X64-MOVBE-NEXT: movbeq %rdx, 16(%rdi)
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; X64-MOVBE-NEXT: movbeq %rcx, 8(%rdi)
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; X64-MOVBE-NEXT: movbeq %r8, (%rdi)
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; X64-MOVBE-NEXT: movq %rdi, %rax
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; X64-MOVBE-NEXT: retq
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%1 = call i256 @llvm.bswap.i256(i256 %a0)
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ret i256 %1
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}
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